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參數(shù)資料
| 型號： | MTA85802S-04I/SS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO20 |
| 封裝： | 0.209 INCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 71/72頁 |
| 文件大?。?/td> | 760K |
| 代理商： | MTA85802S-04I/SS |
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MTA85XXX
DS40115C-page 8
1995 Microchip Technology Inc.
4.0
PROGRAM MEMORY
The MTA854XX devices contain 512 12-bit words of
program memory. The MTA858XX devices contain
2048 12-bit words. Refer to Figure 4-1 and Figure 4-2
for a description of the program memory organization.
4.1
Program Memory Organization
Up to 512 words of 12-bit wide on-chip program mem-
ory (EPROM/ROM) can be directly addressed. Larger
program memories can be addressed by selecting one
of up to four available pages of 512 words each
(Figure 4-2). Sequencing of instructions is controlled
via the Program Counter (PC) which automatically
increments to execute in-line programs. Program con-
trol operations supporting direct, indirect, and relative
addressing modes, can be performed by bit test, skip,
call, and jump type instructions, or by loading com-
puted addresses into the PC. In addition, an on-chip
two-level stack is employed to provide easy to use sub-
routine nesting.
4.2
Program Counter
The program counter generates addresses for on-chip
EEPROM containing the program instruction words.
The program counter is set to all '1's upon a RESET
condition.
During
program
execution,
it is auto
incremented with each instruction unless the result of
that instruction changes the PC itself:
a)
GOTO
instructions allow the direct loading of the
lower nine program counter bits (PC8:PC0). For
MTA858XX devices, the upper two bits of PC
(PC10:PC9) are loaded with page select bits
PA1:PA0 (STATUS <6:5>). Thus GOTO permits
jumping to any location on any page.
b)
CALL
instructions load the lower 8-bits of the PC
directly while the 9-bits are cleared. The PC
value, incremented by one, will be PUSH’ed
onto the stack. For MTA858XX, the upper two
bits of PC (PC10:PC9) are loaded with Page
Select bits PA1:PA0 (STATUS <6:5>).
c)
RETLW
instructions load the program counter
with the top of stack contents.
d)
If the PC is the destination in any instruction
(e.g., MOVWF PC, ADDWF PC, or BSF PC, 5),
then the computed 8-bit result will be loaded into
the low 8-bits of program counter. The ninth bit
of PC will be cleared. In MTA858XX devices
PC10:PC9 will be loaded with the page select
bits.
The
MTA858XX
devices have
multiple
program
memory pages. It should be noted for the MTA858XX
products that because bit 8 (ninth bit) of PC is cleared
in CALL instruction or any instruction which writes to
the PC (e.g., MOVWF PC), all subroutine calls or com-
puted jumps are limited to the first 256 locations of any
program memory page (512 words long).
Incrementing the program counter when it is pointing to
the last address of a selected memory page is also
possible and will cause the program to continue in the
next page. However, the page pre-select bits in the
STATUS register will not be changed and the next
GOTO, CALL, ADDWF PC, MOVWF PC
instruction will
return to the previous page unless the page pre-select
bits have been updated under program control. For
example, a NOP at location 1FFh (page 0) increments
the PC to 200h (page 1). A “GOTO xxx” at 200h will
return the program to address “xxx” on page 0 (assum-
ing that the page preselect bits in the STATUS register
are '0').
Upon a RESET condition, page 0 is pre-selected while
the program counter addresses the last location in the
last page. Thus, a GOTO instruction at this location will
automatically cause the program to continue in page 0.
Note:
The MTA854XX devices only have a single
page, page 0 (Figure 4-1).
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