參數(shù)資料
型號(hào): MTD20N03HDLT4
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: 20 A, 30 V, 0.04 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: DPAK-3
文件頁數(shù): 5/12頁
文件大?。?/td> 180K
代理商: MTD20N03HDLT4
MTD20N03HDL
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(Cpk ≥ 2.0) (3)
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
V(BR)DSS
30
43
Vdc
mV/
°C
Zero Gate Voltage Drain Current
(VDS = 30 Vdc, VGS = 0 Vdc)
(VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
10
100
Adc
Gate–Body Leakage Current
(VGS = ±15 Vdc, VDS = 0 Vdc)
IGSS
100
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(Cpk ≥ 2.0) (3)
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
VGS(th)
1.0
1.5
5.0
2.0
Vdc
mV/
°C
Static Drain–to–Source On–Resistance
(Cpk ≥ 2.0) (3)
(VGS = 4.0 Vdc, ID = 10 Adc)
(VGS = 5.0 Vdc, ID = 10 Adc)
RDS(on)
0.034
0.030
0.040
0.035
Ohm
Drain–to–Source On–Voltage (VGS = 5.0 Vdc)
(ID = 20 Adc)
(ID = 10 Adc, TJ = 125°C)
VDS(on)
0.55
0.8
0.7
Vdc
Forward Transconductance
(VDS = 5.0 Vdc, ID = 10 Adc)
gFS
10
13
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(V
25 Vdc V
0 Vdc
Ciss
880
1260
pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Coss
300
420
Transfer Capacitance
f = 1.0 MHz)
Crss
80
150
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
(V
15 Vd
I
20 Ad
td(on)
13
20
ns
Rise Time
(VDD = 15 Vdc, ID = 20 Adc,
VGS =5 0Vdc
tr
212
238
Turn–Off Delay Time
VGS = 5.0 Vdc,
RG = 9.1 )
td(off)
23
40
Fall Time
G
)
tf
84
140
Gate Charge
(See Figure 8)
(V
24 Vd
I
20 Ad
QT
13.4
18.9
nC
(See Figure 8)
(VDS = 24 Vdc, ID = 20 Adc,
Q1
3.0
( DS
, D
,
VGS = 5.0 Vdc)
Q2
7.3
Q3
6.0
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(Cpk ≥ 2.0) (3)
(IS = 20 Adc, VGS = 0 Vdc)
(IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD
0.95
0.87
1.1
Vdc
Reverse Recovery Time
(See Figure 15)
(I
20 Ad
V
0 Vd
trr
33
ns
(See Figure 15)
(IS = 20 Adc, VGS = 0 Vdc,
ta
23
( S
,
GS
,
dIS/dt = 100 A/s)
tb
10
Reverse Recovery Stored Charge
QRR
33
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25
″ from package to center of die)
LD
4.5
nH
Internal Source Inductance
(Measured from the source lead 0.25
″ from package to source bond pad)
LS
7.5
nH
(1) Pulse Test: Pulse Width
≤ 300 s, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values. Cpk = Absolute Value of Spec (Spec–AVG/3.516 A).
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