參數(shù)資料
型號(hào)： MUNICH128X
廠商： SIEMENS A G
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封裝： METRIC, PLASTIC, QFP-160
文件頁(yè)數(shù)： 6/39頁(yè)
文件大小： 227K
代理商： MUNICH128X
MUNICH128X
Functional Block Description
Semiconductor Group
14
1997-12-01
3.2
Global Functional Blocks
The MUNICH128X provides global functional blocks for the Internal Bus, Arbiter, and
32 Bit / 33 MHz PCI 2.1 Interface as well as De-multiplexed Bus Interface Controller.
3.2.1
Internal Bus
This block of the MUNICH128X interfaces the Bus Interface Controller to the four DMA
Controllers. This is a 33 MHz, 32 Bit demultiplexed bus that operates in a synchronous,
non–burst manner for data transfers and operates in a synchronous burst manner for
descriptor transfers.
3.2.2
Arbiter
The Arbiter provides access control of the Internal Bus. A “round-robin” Arbiter is used
which provides “fairness” for the four master DMA controllers.
3.2.3
32 Bit / 33 MHz Bus Interface Controller
The MUNICH128X may be configured either for 32 Bit / 33 MHz PCI bus operation or for
a 32 Bit / 33 MHz De-multiplexed bus interface. The MUNICH128X input pins DPCI(1:0)
are used to select the desired configuration.
The De-multiplexed bus interface is a synchronous interface very similar to the PCI
interface with the following exceptions:
1. The W/R input/output signal replaces the function of the PCI command nibble of the
C/BE(3:0) bit field.
2. Note, that in DEMUX mode as in PCI mode the MUNICH128X provides only the first
address of a Master burst read or write transaction. If burst transactions are not
supported by the local bus environment, burst capability can be disabled by bit DBE
in the global configuration register (CONF).
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