參數(shù)資料
型號: MVTX2602AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Managed 24 Port 10/100 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA553
封裝: 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
文件頁數(shù): 15/147頁
文件大小: 924K
代理商: MVTX2602AG
MVTX2602
Data Sheet
15
Zarlink Semiconductor Inc.
The parameters are contained in 8-bit configuration registers. The MVTX2602 allows indirect access to these
registers, as follows:
If operating in 8-bits interface mode, two “index” registers (addresses 000 and 001) need to be written to indicate
the desired 8-bit register address. In 16-bit mode only one register (address 000) needs to be written for the desired
16-bit register address.
To indirectly configure the register addressed by the two index registers, a “configure data” register (address 010)
must be written with the desired 8-bit data.
Similarly, to read the value in the register addressed by the two index registers, the “configure data” register can now
simply be read.
In summary, access to the many internal registers is carried out simply by directly accessing only three registers –
two registers to indicate the address of the desired parameter and one register to read or write a value. As there is
only one bus master, there can never be any conflict between reading and writing the configuration registers.
2.3.2 Rx/Tx of Standard Ethernet Frames
The CPU interface is also responsible for receiving and transmitting standard Ethernet frames to and from the
CPU.
To transmit a frame from the CPU:
The CPU writes a “data frame” register (address 011) with the data it wants to transmit (minimum 64 bytes). After
writing all the data, it then writes the frame size, destination port number, and frame status.
The MVTX2602 forwards the Ethernet frame to the desired destination port, no longer distinguishing the fact that the
frame originated from the CPU.
To receive a frame into the CPU:
The CPU receives an interrupt when an Ethernet frame is available to be received.
Frame information arrives first in the data frame register. This includes source port number, frame size and VLAN
tag.
The actual data follows the frame information. The CPU uses the frame size information to read the frame out.
In summary, receiving and transmitting frames to and from the CPU is a simple process that uses one direct
access register only.
2.3.3 Control Frames
In addition to standard Ethernet frames described in the preceding section, the CPU is also called upon to handle
special “Control frames,” generated by the MVTX2602 and sent to the CPU. These proprietary frames are related
to such tasks as statistics collection, MAC address learning and aging, etc. All Control frames are up to 40 bytes
long. Transmitting and receiving these frames is similar to transmitting and receiving Ethernet frames, except that
the register accessed is the “Control frame data” register (address 111).
Specifically, there are eight types of control frames generated by the CPU and sent to the MVTX2602:
Memory read request
Memory write request
Learn MAC address
Delete MAC address
Search MAC address
Learn IP Multicast address
Delete IP Multicast address
Search IP Multicast address
Note:
Memory read and write requests by the CPU may include VLAN table, spanning tree, statistic counters, and
similar updates.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MVTX2602AG2 制造商:Microsemi Corporation 功能描述:
MVTX2603 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 24 port 10/100Mb + 2 port 1Gb Ethernet switch
MVTX2603AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603AG2 制造商:Microsemi Corporation 功能描述: