參數(shù)資料
型號(hào)： MX7847JN+
廠商： Maxim Integrated Products
文件頁數(shù)： 10/12頁
文件大?。?/td> 0K
描述： IC DAC 12BIT DL MULT 24-DIP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 15
設(shè)置時(shí)間： 4µs
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 雙 ±
功率耗散（最大）： 1.07W
工作溫度： 0°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 24-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 24-PDIP
包裝： 管件
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： *
產(chǎn)品目錄頁面： 1398 (CN2011-ZH PDF)
CS, WR, A0, and A1 control data loading to the input
latches. The eight data inputs accept right-justified
data, which can be loaded to the input latches in any
sequence. If
LDAC is held high, loading data to the
input latches will not change the analog output. A0
and A1 determine which input latch will receive the
data when
CS and WR are low. Table 2 shows the
control logic truth table.
Table 2. MX7837 Truth Table
X = Don't Care
The
LDAC input controls 12-bit data transfer from the
input latches to the DAC latches. When
LDAC is taken
low, both DAC latches (thus, both analog outputs) are
updated simultaneously. When
LDAC is low, the DAC
latches are transparent; DAC data is latched on the ris-
ing edge of
LDAC. The LDAC input is asynchronous
and independent of
WR. This is useful in many appli-
cations, especially in updating multiple MX7837s simul-
taneously. However, be careful when exercising
LDAC
during a write cycle; if an
LDAC operation overlaps a
CS and WR operation, invalid data may be latched to
the output. To avoid this,
LDAC must remain low after
CS or WR have returned high for a period equal to or
greater than t8, the minimum LDAC pulse width.
Unipolar Binary Operation
Figure 6 shows DAC A (MX7837/MX7847) connected
for unipolar binary operation. Similar connections
apply for DAC B. When VIN is an AC signal, the circuit
performs 2-quadrant multiplication. Table 3 shows the
code table for this circuit. On the MX7847, the RFB
feedback resistor is internally connected to VOUT.
Table 3. Unipolar Code Table
DAC A
MS
INPUT
LATCH
DAC A LATCH
DAC A
LS
INPUT
LATCH
DAC B
MS
INPUT
LATCH
DAC B
LS
INPUT
LATCH
A1
A0
WR
CS
LDAC
DAC B LATCH
12
4
8
4
8
DB7 DB0
Figure 4. MX7837 Input Control Logic
DAC Latch Contents
MSB
LSB
×
VIN
4095
4096
MX7837/MX7847
Complete, Dual, 12-Bit
Multiplying DACs
_______________________________________________________________________________________
7
CS WR
LDAC
Function
1
X
1
No Data Transfer
X
1
No Data Transfer
0
1
DAC A LS Input Latch Transparent
0
1
DAC A MS Input Latch Transparent
0
1
DAC B LS Input Latch Transparent
0
1
DAC B MS Input Latch Transparent
1
0
Updated Simultaneously from
the Respective Input Latches
A0
X
0
1
0
1
X
A1
X
0
1
X
ADDRESS VALID
VALID DATA
t6
t7
t1
t2
t5
t3
t4
A0/A1
CS
WR
DATA
LDAC
t8
Figure 5. MX7837 Write-Cycle Timing Diagram
Note : 1LSB
V
4096
IN
=
Analog Output, VOUT
1111 1111 1111
1000 0000 0000
×
=
V
1
2
V
IN
2048
4096
0000 0000 0001
×
VIN
1
4096
0000 0000 0000
0V
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MX7847JR+ 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 12Ch Precision ADC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MX7847JR+T 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 12Ch Precision ADC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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