參數(shù)資料
型號: MX98725
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE CHIP FAST ETHERNET NIC CONTROLLER
中文描述: 單晶片快速以太網(wǎng)卡控制器
文件頁數(shù): 4/33頁
文件大?。?/td> 177K
代理商: MX98725
4
P/N:PM0488
REV. 1.7, SEP. 15, 1998
MX98725
Pin Name
PAR
Type
T/S
Pin No.
64
160 Pin Function and Driver
PCI bus parity bit: shared PCI bus even parity bit for 32 bits AD bus and
CBE bus.
PCI Target requested transfer stop signal: as bus master, assertion of
STOPB cause MX98725 either to retry, disconnect, or abort.
PCI bus request signal: to initiate a bus master cycle request
PCI bus grant acknowledge signal: host asserts to inform MX98725
that access to the bus is granted
Power Management Event: asserts low when Magic Packet is received.
Start externel circuit signal: asserts low to enable system's power
supply when Magic Packet is detected. Normally tri-stated.
LAN wake up signal: asserts high to indicate a magic packet has been
detected in Magic Packet enable mode.
Enable On-Chip Power-On-Reset : normally unconnected.
Boot PROM address bit 1(EECS=0): together with BPA[17:0] to access
external boot PROM up to 256KB.
EEPROM data in(EECS=1): EEPROM serial data input pin.
Boot PROM address bit 0(EECS=0): together with BPA[17:0] to access
external boot PROM or FLASH up to 256KB.
EEPROM clock(EECS=1): EEPROM clock input pin
Boot PROM address lines:
STOPB
S/T/S
60
REQB
GNTB
T/S
I
19
18
PMEB
EXSTARTB
O/D
O/D
14
12
LANWAKE
O
11
EN_RPO
BPA1
(EEDI)
I
O
13
111
BPA0
(EECK)
O
110
BPA[17:0]
O
107,108
110-118
123-125
130-132
106
BPD0
(EEDO)
T/S
Boot PROM data line 0(EECS=0): boot ROM or flash data line 0.
(EEPROM data out(EECS=1): EEPROM serial data out pin(during
resetinitialization.)
Boot PROM data lines: boot ROM or FLASH data lines 7-0.
EEPROM chip select.
FLASH Write Enable
FLASH ROM Output Enable
FLASH Chip Select pin
Connecting an external resistor to ground. See application note.
Connecting an external resistor to ground. See application note.
Connecting an external resistor to ground. See application note.
Connecting an external capacitor. See application note.
Twisted pair receive differential input: Support both 10Base-T and
100 Base-TX differential receive input.
Twisted pair receive differential input: Support both 10Base-T and
100 Base-TX receive differential input
BPD[7:0]
EECS
FWEB
FOEB
FCSB
RDA
RTX
RTX2EQ
CPK
RXIP
T/S
O
O
O
O
O
O
O
I
I
99-106
109
119
121
120
139
2
1
160
150
RXIN
I
149
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