參數(shù)資料
型號： N74F174D-T
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： Hex D flip-flops - Description: Hex D-Type Flip-Flop with Reset; Positive-Edge Trigger ; F<sub>max</sub>: 100 MHz; Logic switching levels: TTL ; Number of pins: 16 ; Output drive capability: -1/+20 mA ; Propagation delay: 6 ns; Voltage: 4.5-5.5 V
中文描述： F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
封裝： PLASTIC, SO-16
文件頁數(shù)： 4/8頁
文件大小： 85K
代理商： N74F174D-T
Philips Semiconductors
Product specification
74F174
Hex D flip-flop
October 7, 1988
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS1
MIN
TYP2
MAX
UNIT
VO
High level output voltage
VCC = MIN, VIL = MAX
±10%VCC
2.5
V
VOH
High-level output voltage
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VO
Low level output voltage
VCC = MIN, VIL = MAX
±10%VCC
0.30
0.50
V
VOL
Low-level output voltage
VIH = MIN, IOL = MAX
±5%VCC
0.30
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
100
A
IIH
High-level input current
VCC = MAX, VI = 2.7V
20
A
IIL
Low-level input current
VCC = MAX, VI = 0.5V
–0.6
mA
IOS
Short-circuit output current3
VCC = MAX
–60
–150
mA
ICC
Supply current (total)
VCC = MAX, Dn = MR = 4.5V, CP = ↑
35
45
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5.0V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5.0V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
fMAX
Maximum clock frequency
Waveform 1
80
100
80
MHz
tPLH
tPHL
Propagation delay
CP to Qn
Waveform 1
3.5
4.5
5.5
6.0
8.0
10.0
3.5
4.5
9.0
11.0
ns
tPHL
Propagation delay MR to Qn
Waveform 2
5.0
8.5
14.0
5.0
15.0
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5.0V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5.0V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
tS(H)
tS(L)
Setup time, High or Low
Dn to CP
Waveform 3
4.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to CP
Waveform 3
0.0
ns
tw(H)
tw(L)
CP Pulse width,
High or Low
Waveform 1
4.0
6.0
4.0
6.0
ns
tw(L)
MR Pulse width, Low
Waveform 2
5.0
ns
tREC
Recovery time, MR to CP
Waveform 2
5.0
ns
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