參數(shù)資料
型號： N74F242D
廠商： NXP Semiconductors N.V.
元件分類： 收發(fā)器
英文描述： Quad transceiver, inverting (3-State); Quad transceiver (3-State)
封裝： N74F242D<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week 4, 2004,;N74F242D<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week 4,
文件頁數(shù)： 5/10頁
文件大?。?/td> 93K
代理商： N74F242D
Philips Semiconductors
Product specification
74F242/74F243
Transceivers
1990 Aug 30
5
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
TYP
2
UNIT
MIN
MAX
V
CC
= MIN,
V
IL
= MAX,
V
IH
= MIN
= 3mA
I
OH
= –3mA
±
10%V
CC
2.4
V
V
OH
High level output voltage
High-level output voltage
±
5%V
CC
2.7
3.3
V
CC
= MIN,
V
IL
= MAX,
V
IH
= MIN
I
OL
= –15mA
= 15mA
±
10%V
CC
2.0
3.2
V
±
5%V
CC
2.0
3.1
V
OL
Low level output voltage
Low-level output voltage
V
CC
= MIN,
V
IL
= MAX,
V
IH
= MIN
I
OH
=MAX
±
10%V
CC
0.55
V
±
5%V
CC
0.42
0.55
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 5.5V
V
CC
= MAX, V
I
= 7.0V
–0.73
–1.2
V
I
I
Input current at
maximum input voltage
A0–A3, B0–B3
1
mA
OE
A
, OE
B
100
μ
A
I
IH
High-level input current
OE
A
, OE
B
only
V
CC
= MAX, VI = 2.7V
20
μ
A
I
IL
Low-level input current
V
CC
= MAX, VI = 0.5V
–1
mA
I
IH
+I
OZH
Off-state output current
High-level voltage applied
V
CC
= MAX, V
O
= 2.7V
70
μ
A
I +I
OZL
Off-state output current
Low-level voltage
applied
74F242
V
CC
= MAX, V
O
= 0.5V
= MAX V
= 0 5V
–1.0
mA
74F243
–1.6
I
OS
Short-circuit output current
3
V
CC
= MAX
–100
–225
mA
I
CCH
22
35
mA
74F242
I
CCL
V
CC
= MAX
40
55
mA
I
CC
Supply current (total)
I
CCZ
32
45
mA
I
CCH
64
80
mA
74F243
I
CCL
V
CC
= MAX
64
90
mA
I
CCZ
71
90
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
= 5V, T
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
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