參數(shù)資料
型號(hào): NAND512R4A0CZA1
廠商: 意法半導(dǎo)體
英文描述: 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
中文描述: 128兆,256兆,512兆位,1千兆位(x8/x16)528 Byte/264字的頁面,1.8V/3V,NAND閃存芯片
文件頁數(shù): 18/57頁
文件大?。?/td> 410K
代理商: NAND512R4A0CZA1
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
18/57
Table 6. Address Insertion, x8 Devices
Note: 1. A8 is set Low or High by the 00h or 01h Command, see
Pointer Operations
section.
2. Any additional address input cycles will be ignored.
3. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 7. Address Insertion, x16 Devices
Note: 1. A8 is Don’t Care in x16 devices.
2. Any additional address input cycles will be ignored.
3. The 01h Command is not used in x16 devices.
4. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 8. Address Definitions
Bus Cycle
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
1
st
A7
A6
A5
A4
A3
A2
A1
A0
2
nd
A16
A15
A14
A13
A12
A11
A10
A9
3
rd
A24
A23
A22
A21
A20
A19
A18
A17
4
th(4)
V
IL
V
IL
V
IL
V
IL
V
IL
V
IL
A26
A25
Bus
Cycle
I/O8-
I/O15
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
1
st
X
A7
A6
A5
A4
A3
A2
A1
A0
2
nd
X
A16
A15
A14
A13
A12
A11
A10
A9
3
rd
X
A24
A23
A22
A21
A20
A19
A18
A17
4
th(4)
X
V
IL
V
IL
V
IL
V
IL
V
IL
V
IL
A26
A25
Address
Definition
A0 - A7
Column Address
A9 - A26
Page Address
A9 - A13
Address in Block
A14 - A26
Block Address
A8
A8 is set Low or High by the 00h or 01h Command, and is
Don’t Care in x16 devices
相關(guān)PDF資料
PDF描述
NAND512R4A0CZA1T 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
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NAND512W3M5BZB5F 256/512Mb/1Gb (x8/x16, 1.8/3V, 528 Byte Page) NAND Flash Memories 256/512Mb (x16/x32, 1.8V) LPSDRAM, MCP
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