參數(shù)資料
型號: NB3N49152MNG
廠商: ON Semiconductor
文件頁數(shù): 3/6頁
文件大?。?/td> 0K
描述: IC CLK GEN VCXO LVPECL 20QFN
標(biāo)準(zhǔn)包裝: 92
系列: PureEdge™
類型: *
PLL:
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/是
頻率 - 最大: 491.52MHz
除法器/乘法器: 無/是
電源電壓: 2.97 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 20-QFN(4x4)
包裝: 管件
NB3Nxxxxx VCXO Series
http://onsemi.com
3
Table 2. PIN DESCRIPTION
Pin
Description
I/O
Name
20
nc
No connect
EP
The Exposed Pad (EP) on the QFN20 package bottom is thermally connected to the die for
improved heat transfer out of package. The exposed pad must be attached to a heatsinking
conduit. The pad is electrically connected to the die, and must be electrically and thermally
connected to GND on the PC board.
1. All VDD and GND pins must be externally connected to a power supply for proper operation.
Table 3. ATTRIBUTES
Characteristics
Value
Internal Default State Resistor (OE)
170 kW
ESD Protection Human Body Model
Machine Model
2 kV
200 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 2)
Level 1
Flammability Rating Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
3510 Devices
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
2. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Rating
Unit
VDD
Positive Power Supply
GND = 0 V
4.6
V
VIN
Control Input (VC and OE)
VIN ≤ VDD + 200 mV
VIN ≥ GND 200 mV
V
IOUT
LVPECL Output Current
Continuous
Surge
25
50
mA
TA
Operating Temperature Range
40 to +85
°C
Tstg
Storage Temperature Range
55 to +120
°C
qJA
Thermal Resistance (JunctiontoAmbient)
0 lfpm
500 lfpm
QFN20
47
33
°C/W
qJC
Thermal Resistance (JunctiontoCase)
(Note 3)
Standard Board
QFN20
18
°C/W
Tsol
Wave Solder PbFree
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. JEDEC standard multilayer board 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.
Table 5. RECOMMENDED CRYSTAL PARAMETERS
Crystal Type
Fundamental ATCut
Frequency
Various Device dependent; see AC Table
Load Capacitance
16 pF
Shunt Capacitance, C0
3.2 pF typical
Motional Capacitance (C1)
12 fF typical
Capacitance Ratio (C0/C1)
260 typical
ESR (Equivalent Series Resistance)
25 W max; 5 W typical
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