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參數(shù)資料
| 型號： | NB7L1008MMNR4G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER 1:8 8GHZ 32-QFN |
| 標準包裝： | 1,000 |
| 系列： | GigaComm™ |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:8 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVCMOS，LVDS，LVPECL，LVTTL |
| 輸出： | CML |
| 頻率 - 最大： | 8GHz |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 32-QFN（5x5） |
| 包裝： | 帶卷 (TR) |
NB7L1008M
http://onsemi.com
5
Symbol
Characteristic
Min
Typ
Max
Unit
fDATA
Maximum Operating Input Data Rate
10
12
Gb/s
fINCLK
Maximum Input Clock Frequency, VOUTPP w 200 mV
6
8
GHz
VOUTPP
fin v 4 GHz
fin v 6 GHz
200
400
350
mV
VCMR
Input Common Mode Range (Differential Configuration,
600
VCC 50
mV
tPLH, tPHL Propagation Delay to Output Differential, IN/IN to Qn/Qn
100
160
250
ps
tPLH TC
Propagation Delay Temperature Coefficient 40°C to +85°C
35
fs/°C
tDC
Output Clock Duty Cycle fin v 6 GHz
45
49/51
55
%
tSKEW
Duty Cycle Skew (Note 13)
Within Device Skew (Note 14)
Device to Device Skew (Note 15)
0.15
7
25
1
25
70
ps
tJITTER
Data Dependent Jitter (DDJ) (Note 17) v10 Gb/s
0.2
3
0.8
20
ps
VINPP
Input Voltage Swing (Differential Configuration) (Note 18)
(Figure 5)
100
1200
mV
tr, tf
Output Rise/Fall Times (20% 80%) Qn, Qn
20
45
70
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Measured using a 400 mV source, 50% duty cycle 1 GHz clock source. All outputs must be loaded with external 50 W to VCC. Input
edge rates 40 ps (20% 80%).
11. Output voltage swing is a singleended measurement operating in differential mode.
12.VIHDMIN ≥ 1100 mV.
13.Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ @ 1 GHz.
14.Within device skew compares coincident edges.
15.Device to device skew is measured between outputs under identical transition
16.Additive CLOCK jitter with 50% duty cycle clock signal.
17.Additive PeaktoPeak jitter with input NRZ data at PRBS23.
18.Input voltage swing is a singleended measurement operating in differential mode.
Figure 2. Output Voltage Amplitude (VOUTPP)
vs. Input Frequency (fin) at Ambient
Temperature (Typical)
500
450
400
350
300
250
200
0
1.0
2.0
3.0
8.0
7.0
6.0
5.0
4.0
.
fout, CLOCK OUTPUT FREQUENCY (GHz)
OUTPUT
VOL
TAGE
AMPLITUDE
(mV)
Q Output Amplitude (mV)
Figure 3. Input Structure
50 W
VT
VCC
IN
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| NB7L1008MMNTWG | 制造商:ON Semiconductor 功能描述:TSMC 1:8 F/O MLL-CML - Tape and Reel |
| NB7L111M | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output |
| NB7L111MMN | 功能描述:時鐘驅(qū)動器及分配 2.5V/3.3V 6.125Gb/s RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| NB7L111MMNG | 功能描述:時鐘驅(qū)動器及分配 2.5V/3.3V 6.125Gb/s 1:10 Clk/Data Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| NB7L111MMNR2 | 功能描述:時鐘驅(qū)動器及分配 2.5V/3.3V 6.125Gb/s RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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