參數(shù)資料
型號: NB7V585MMNR4G
廠商: ON Semiconductor
文件頁數(shù): 2/8頁
文件大?。?/td> 0K
描述: IC CLK/DTA BUFF MUX TRNSLA 32QFN
標準包裝: 1,000
系列: GigaComm™
類型: 扇出緩沖器(分配),多路復用器,變換器,數(shù)據(jù)
電路數(shù): 1
比率 - 輸入:輸出: 2:6
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL
輸出: CML
頻率 - 最大: 7GHz
電源電壓: 1.71 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-QFN(5x5)
包裝: 帶卷 (TR)
NB7V585M
http://onsemi.com
2
GND
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
IN1
IN0
GND
VCC
Q3
Q2
GND
VCC
VREFAC0
IN0
VT1
VREFAC1
VT0
Figure 1. 32Lead QFN Pinout (Top View)
NB7V585M
Exposed Pad
(EP)
NC
VCC
Q5
Q4
VCC
GND
SEL
VCC
Q0
Q1
VCC
Table 1. INPUT SELECT FUNCTION TABLE
SEL*
CLK Input Selected
0
IN0
1
IN1
*Defaults HIGH when left open.
Table 2. PIN DESCRIPTION
Pin
Name
I/O
Description
1,4
5,8
IN0, IN0
IN1, IN1
LVPECL, CML,
LVDS Input
Noninverted, Inverted, Differential Inputs
2,6
VT0, VT1
Internal 100 W Centertapped Termination Pin for IN0/IN0 and IN1/IN1
31
SEL
LVTTL/LVCMOS
Input
Input Select pin; LOW for IN0 Inputs, HIGH for IN1 Inputs; defaults HIGH when left open
10
NC
No Connect
11, 16, 18
23, 25, 30
VCC
Positive Supply Voltage.
29, 28
27, 26
Q0, Q0
Q1, Q1
CML Output
Noninverted, Inverted Differential Outputs (Note 1).
22, 21
20, 19
Q2, Q2
Q3, Q3
CML Output
Noninverted, Inverted Differential Outputs (Note 1).
15, 14
13, 12
Q4, Q4
Q5, Q5
CML Output
Noninverted, Inverted Differential Outputs (Note 1).
9, 17,
24, 32
GND
Negative Supply Voltage, connected to Ground
3
7
VREFAC0
VREFAC1
Output Voltage Reference for CapacitorCoupled Inputs, only
EP
The Exposed Pad (EP) on the QFN32 package bottom is thermally connected to the
die for improved heat transfer out of package. The exposed pad must be attached to a
heatsinking conduit. The pad is electrically connected to the die, and must be electric-
ally and thermally connected to GND on the PC board.
1. In the differential configuration when the input termination pins (VT0, VT1) are connected to a common termination voltage or left open, and
if no signal is applied on INn/INn input, then, the device will be susceptible to selfoscillation. Qn/Qn outputs have internal 50 W source
termination resistors.
2. All VCC and GND pins must be externally connected to a power supply for proper operation.
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