Note 3: CPD is defined as" />
參數(shù)資料
型號: NC7S00M5
廠商: Fairchild Semiconductor
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC GATE NAND 2-INP SGL SOT23-5
產(chǎn)品變化通告: Mold Compound Change 12/Dec/2007
標準包裝: 1
系列: 7S
邏輯類型: 與非門
電路數(shù): 1
輸入數(shù): 2
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 1µA
輸出電流高,低: 2.6mA,2.6mA
邏輯電平 - 低: 0.5V
邏輯電平 - 高: 1.5V
額定電壓和最大 CL 時的最大傳播延遲: 17ns @ 6V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應商設備封裝: SOT-23-5
封裝/外殼: SC-74A,SOT-753
包裝: 標準包裝
其它名稱: NC7S00M5DKR
3
www.fairchildsemi.com
NC7S00
AC Electrical Characteristics
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR
= 1.0 MHz, t
w = 500 ns
FIGURE 1. AC Test Circuit
Input
= AC Waveform;
PRR
= variable; Duty Cycle = 50%
FIGURE 2. ICCD Test Circuit
FIGURE 3. AC Waveforms
Symbol
Parameter
VCC
TA = +25°CTA = 40°C to +85°C
Units
Conditions
Figure
(V)
Min
Typ
Max
Min
Max
Number
tPLH,
Propagation Delay
5.0
3.5
15
ns
CL = 15 pF
Figures
1, 3
tPHL
2.0
19
100
125
ns
CL = 50 pF
3.0
10.5
27
35
4.5
7.5
20
25
6.0
6.5
17
21
tTLH,
Output Transition Time
5.0
3.0
10
ns
CL = 15 pF
Figures
1, 3
tTHL
2.0
25
125
155
ns
CL = 50 pF
3.0
16
35
45
4.5
11
25
31
6.0
9
21
26
CIN
Input Capacitance
Open
2
10
pF
CPD
Power Dissipation Capacitance
5.0
6
pF
(Note 3)
Figure 2
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