參數(shù)資料
型號(hào): NCP1080DEG
廠商: ON Semiconductor
文件頁(yè)數(shù): 8/15頁(yè)
文件大小: 221K
描述: IC CONV CTLR POE-PD 13W 20-TSSOP
標(biāo)準(zhǔn)包裝: 74
類型: 以太網(wǎng)供電開關(guān)(PoE)
應(yīng)用: 遠(yuǎn)程外設(shè)(工業(yè)控制,相機(jī),數(shù)據(jù)訪問)
內(nèi)部開關(guān):
電流限制: 500mA
電源電壓: 0 V ~ 57 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)裸露焊盤
供應(yīng)商設(shè)備封裝: 20-TSSOP-EP
包裝: 管件
NCP1080
http://onsemi.com
8
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Min.
Typ.
Max.
Units
Conditions
PASSSWITCH AND CURRENT LIMITS
Ron
Passswitch Rdson

0.6
1.2
W
Max Ron specified at
Tj = 130癈
I_Rinrush1
Rinrush = 150 kW (Note 7)
95
125
155
mA
Measured at RTN
VPORTN
1,2
 = 3 V
I_Rinrush2
Rinrush = 57.6 kW (Note 7)
260
310
360
mA
Measured at RTN
VPORTN
1,2
 = 3 V
I_Rilim1
Rilim1 = 84.5 kW (Note 7)
450
510
570
mA
Current limit threshold
INRUSH AND ILIM1 CURRENT LIMIT TRANSITION
Vds_pgood
VDS required for power good status
0.8
1
1.2
V
RTNVPORTN
1,2
falling; voltage with re-
spect to VPORTN
1,2
Vds_pgood_hyst
VDS hysteresis required for power good
status

8.2

V
Voltage with respect to
VPORTN
1,2
VDDH REGULATOR
VDDH_reg
Regulator output voltage (Notes 8 and 9)
Ivddh_load + Ivddl_load < 10 mA
with
0 < Ivddl_load < 2.25 mA
8.4
9
9.6
V
VDDH_Off
Regulator turnoff voltage

VDDH_reg
+ 0.5 V

V
For information only
VDDH_lim
VDDH regulator current limit
(Notes 8 and 9)
13

26
mA
VDDH_Por_R
VDDH POR level (rising)
7.3

8.3
V
VDDH_Por_F
VDDH POR level (falling)
6

7
V
VDDH_ovlo
VDDH overvoltage level (rising)
16

18.5
V
VDDL REGULATOR
VDDL_reg
Regulator output voltage (Notes 8 and 9)
0 < Ivddl_load < 2.25 mA
with
Ivddh_load + Ivddl_load < 10 mA
3.05
3.3
3.55
V
VDDL_Por_R
VDDL POR level (rising)
VDDL
 0.2

VDDL
 0.02
V
VDDL_Por_F
VDDL POR level (falling)
2.5

2.9
V
GATE DRIVER
Gate_Tr
GATE rise time (1090%)


50
ns
Cload = 2 nF,
VDDHreg = 9 V
Gate_Tf
GATE fall time (9010%)


50
ns
Cload = 2 nF,
VDDHreg = 9 V
PWM COMPARATOR
VCOMP
COMP control voltage range
1.3

3
V
For information only
7.  The current value corresponds to the PoEPD input current (the current flowing in the external Rdet and the quiescent current of the device
are included). Resistors are assumed to have 1% accuracy.
8.  Power dissipation must be considered. Load on VDDH and VDDL must be limited especially if VDDH is not powered by an auxiliary winding.
9.  Ivddl_load = current flowing out of the VDDL pin.
Ivddh_load = current flowing out of the VDDH pin + current delivered to the Gate Driver (function of the frequency, VDDH voltage & MOSFET
gate capacitance).
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