NCP1082
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7
Recommended Operating Conditions
Operating conditions define the limits for functional operation and parametric characteristics of the device. Note that the
functionality of the device outside the operating conditions described in this section is not warranted. Operating outside the
recommended operating conditions for extended periods of time may affect device reliability.
All values concerning the DCDC controller, VDDH and VDDL blocks are with respect to ARTN. All others are with respect
to VPORTN
1,2
(unless otherwise noted).
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
INPUT SUPPLY
VPORT
Input supply voltage
VPORT = VPORTP
VPORTN
1,2
0
57
V
SIGNATURE DETECTION
Vsignature
Input supply voltage signature detection range
1.4
9.5
V
Rsignature
Signature resistance (Note 4)
23.75
26.25
kW
Offset_current
I_VportP + I_Rtn
VPORTP = RTN = 1.4 V
1.8
5
mA
Sleep_current
I_VportP + I_Rtn
VPORTP = RTN = 9.5 V
15
25
mA
CLASSIFICATION
Vcl
Input supply voltage classification range
13
20.5
V
Iclass0
Class 0: Rclass 10 kW (Note 5)
Iclass0 = I_VportP + I_Rdet
0
4
mA
Iclass1
Class 1: Rclass 130 W (Note 5)
Iclass1 = I_VportP + I_Rdet
9
12
mA
Iclass2
Class 2: Rclass 69.8 W (Note 5)
Iclass2 = I_VportP + I_Rdet
17
20
mA
Iclass3
Class 3: Rclass 44.2 W (Note 5)
Iclass3 = I_VportP + I_Rdet
26
30
mA
Iclass4
Class 4: Rclass 30.9 W (Note 5)
Iclass4 = I_VportP + I_Rdet
36
44
mA
IDC
class
Internal current consumption during
classification (Note 6)
For information only
600
mA
UVLO
Vuvlo_on
Default turn on voltage (VportP rising)
UVLO pin tied to
VPORTN
1,2
38
40
V
Vuvlo_off
Default turn off voltage (VportP falling)
UVLO pin tied to
VPORTN
1,2
29.5
32
V
Vhyst_int
UVLO internal hysteresis
UVLO pin tied to
VPORTN
1,2
6
V
Vuvlo_pr
UVLO external programming range
UVLO pin connected to the
resistor divider (R1 & R2)
AUX pin tied to VPORTN
1,2
For information only
13
50
V
Vuvlo_pr_aux
UVLO external programming VPORT range
with low auxiliary supply support
UVLO & AUX pins configured
for auxiliary supply support
8.5
18
V
Vhyst_ext
UVLO external hysteresis
UVLO pin connected to the
resistor divider (R1 & R2)
15
%
Uvlo_Filter
UVLO on/off filter time
For information only
90
mS
AUXILIARY SUPPLY OPERATION INPUT SUPPLY
Vaux_min1
VPORTPARTN voltage at startup
(required for VDDH > VDDH_Por_R)
VAUX rising No external
load on VDDL & VDDH
8.7
V
Vaux_min2
VPORTPARTN voltage during PWM opera-
tion (required for VDDH > VDDH_Por_F)
Voltage with respect to
Ivddl_load1 & Ivddh_load1
for the load current conditions
8.5
V
4.  Test done according to the IEEE 802.3af 2 Point Measurement. The minimum probe voltages measured at the PoEPD are 1.4 V and 2.4 V,
and the maximum probe voltages are 8.5 V and 9.5 V.
5.  Measured with an external Rdet of 25.5 kW between VPORTP and VPORTN
1,2
, and for 13 V < VPORT < 20.5 V (with VPORT = VPORTP
VPORTN
1,2
). Resistors are assumed to have 1% accuracy.
6.  This typical current excludes the current in the Rclass and Rdet external resistors.