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| 型號(hào)： | NCP1607BDR2G |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 21/23頁(yè) |
| 文件大?。?/td> | 255K |
| 描述： | IC PFC CONTROLLER CRM 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 模式： | 臨界傳導(dǎo)（CRM） |
| 電流 - 啟動(dòng)： | 23.5µA |
| 電源電壓： | 9.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | NCP1607BDR2GOSDKR |
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NCP1607
http://onsemi.com
21
BOOST DESIGN EQUATIONS Components are identified in Figure 1
RMS Input Current
Iac +
P
OUT
h @ Vac
h (the efficiency of only the Boost
PFC stage) is generally in the range
of 90 95%
Maximum Inductor Peak
Current
I
pk(MAX)
+
2 @ 2
@ P
OUT
h @ Vac
LL
Where Vac
LL
is the minimum line in-
put voltage. I
pk(MAX)
occurs at the
lowest line voltage.
Inductor Value
L v
2 @ Vac
2
@
V
OUT
2
* Vac
V
OUT
@ Vac @ I
pk(MAX)
@ f
SW(min)
f
SW(MIN)
is the minimum desired
switching frequency. The maximum L
must be calculated at low line and
high line.
Maximum On Time
t
on(MAX)
+
2 @ L @ P
OUT
h @ Vac
LL
2
The maximum on time occurs at the
lowest line voltage and maximum
output power.
Off Time
t
off
+
t
on
V
OUT
Vac@
sin(q)
@ 2
* 1
The off time is greatest at the peak of
the ac line voltage and approaches
zero at the ac line zero crossings.
Theta (q) represents the angle of the
ac line voltage.
Frequency
f
SW
+
Vac
2
@ h
2 @ L @ P
OUT
@1 *
Vac @ |sinq| @ 2
V
OUT
Pin 3 Capacitor
Ct w
2 @ P
OUT
@ L @ I
CHARGE
h @ Vac
2
@ V
CTMAX
I
CHARGE
and V
CTMAX
are given in
the NCP1607 specification table.
Boost Turns to ZCD Turns
Ratio
N
B
: N
ZCD
v
V
OUT
* Vac
HL
@ 2
V
ZCDH
Where Vac
HL
is the maximum line
input voltage. The turns ratio must be
low enough so as to trigger the ZCD
comparators at high line.
Resistor from ZCD wind-
ing to the ZCD pin (pin 5)
R
ZCD
w
Vac
HL
@ 2
I
CL(NEG)
@ (N
B
: N
ZCD
)
R
ZCD
must be large enough so that
the shutdown comparator is not inad-
vertently activated.
Boost Output Voltage
V
OUT
+ V
REF
@
R
OUT1
) R
EQ
R
EQ
R
EQ
+
R
OUT2
@ R
FB
R
OUT2
) R
FB
Maximum V
OUT
voltage
prior to OVP activation and
the necessary R
OUT1
and
R
OUT2
.
V
OUT(OVP)
+ V
OUT
)
I
OVP
@ R
OUT1
R
OUT1
+
V
OUT(OVP)
* V
OUT
I
OVP
R
EQ
+ R
OUT1
@
V
REF
V
OUT
* V
REF
R
OUT2
+
R
EQ
) R
FB
R
FB
* R
EQ
I
OVP
is given in the NCP1607 spe-
cification table.
Minimum output voltage
necessary to exit under-
voltage protection (UVP)
V
OUT(UVP)
+ V
UVP
@
R
OUT1
) R
EQ
R
EQ
V
UVP
is given in the NCP1607 spe-
cification table.
Bulk Cap Ripple
V
ripple(pkpk)
+
P
OUT
C
BULK
@ 2 @ p @ f
line
@ V
OUT
Use f
line
= 47 Hz for worst case at
universal lines. The ripple must not
exceed the OVP level for V
OUT
.
Inductor RMS Current
I
L(RMS)
+
2 @ P
OUT
3
@ Vac
LL
@ h
Boost Diode RMS Current
I
D(RMS)MAX
+
4
3
@
2 @ 2
p
@
P
OUT
h @ Vac
LL
@ V
OUT
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