參數(shù)資料
型號: NCP302
廠商: ON SEMICONDUCTOR
英文描述: Voltage Detector Series with Programmable Delay
中文描述: 電壓檢測器系列,具有可編程延遲
文件頁數(shù): 17/26頁
文件大?。?/td> 191K
代理商: NCP302
NCP302, NCP303
http://onsemi.com
17
OPERATING DESCRIPTION
The NCP302 and NCP303 series devices consist of a
precision voltage detector that drives a time delay generator.
Figures 37 and 38 show a timing diagram and a typical
application. Initially consider that input voltage V
in
is at a
nominal level and it is greater than the voltage detector upper
threshold (V
DET+
). The voltage at Pin 5 and capacitor C
D
will be at the same level as V
in
, and the reset output (Pin 1)
will be in the high state for active low devices, or in the low
state for active high devices. If there is a power interruption
and V
in
becomes significantly deficient, it will fall below the
lower detector threshold (V
DET
) and the external time
delay capacitor C
D
will be immediately discharged by an
internal NChannel MOSFET that connects to Pin 5. This
sequence of events causes the Reset output to be in the low
state for active low devices, or in the high state for active
high devices. After completion of the power interruption,
V
in
will again return to its nominal level and become greater
than the V
DET+
. The voltage detector will turn off the
NChannel MOSFET and allow pullup resistor R
D
to charge
external capacitor C
D
, thus creating a programmable delay
for releasing the reset signal. When the voltage at Pin 5
exceeds the inverter/buffer threshold, typically 0.675 V
in
,
the reset output will revert back to its original state. The reset
output time delay versus capacitance is shown in Figures 12
through 14. The voltage detector and inverter/buffer have
builtin hysteresis to prevent erratic reset operation.
Although these device series are specifically designed for
use as reset controllers in portable microprocessor based
systems, they offer a costeffective solution in numerous
applications where precise voltage monitoring and time
delay are required. Figures 38 through 45 show various
application examples.
Figure 37. Timing Waveforms
t
D2
V
in
V
DET
+
V
DET
Input Voltage, Pin 2
Capacitor, Pin 5
V
in
0 V
Reset Output (Active Low), Pin 1
V
in
Reset Output (Active High), Pin 1
V
in
0 V
0.675 V
in
V
DET
V
DET
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