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參數(shù)資料
| 型號(hào)： | NCP5208 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | DDR-I/II Termination Regulator |
| 中文描述： | DDR-I/II終端調(diào)節(jié)器 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 82K |
| 代理商： | NCP5208 |
NCP5208
http://onsemi.com
8
APPLICATIONS INFORMATION
Typical Application Circuit
The NCP5208 is a highly integrated termination
regulator. For most applications, an input and output
capacitor and a pullup resistor for the power OK output,
are the only external components needed. For typical
application circuit, refer to Figure 1.
AVIN and VDDQ Supply
AVIN provides power for the device to operate. This
voltage must be kept clean and free from transients. A small
capacitor, 1.0 F is recommended at this input to provide
the required supply filtering and ripple rejection. VDDQ is
primarily used to generate the internal voltage reference, so
any noise or transient at this pin will be directly reflected
at the VTT output. In order to avoid undesired interference
injected into this pin, appropriate decoupling and careful
design of PCB layout is required.
Input Capacitor Selection
The NCP5208 does not require an input capacitor for
stability, however it is still recommended for better overall
performance during large load transients that can cause
sudden drop of the power rail voltage. The input capacitor
must be located as close as possible to the PVIN pin to
avoid a transient voltage dip affecting the quality of AVIN
and VDDQ. For typical DDRI applications, a low ESR
electrolytic capacitor of 100 F or larger is recommended.
By adding a small ceramic capacitor of 0.1 F in parallel,
the best high frequency transient filtering will result. If the
device is located near the main supply bulk capacitors, the
input capacitance can be reduced accordingly.
Output Capacitor Selection
The NCP5208 is internally compensated and stable for
any output capacitor with capacitance greater than 220 F
and with ESR ranging from 2 m to 400 m
for this output capacitor is determined solely by the
application and the requirements for load transient
characteristic
of
VTT
recommendation, the capacitance should be larger than
220 F with low ESR for SSTL and DDR memory
applications.
The choice
output.
As
a
general
Thermal Dissipation
The NCP5208 is a linear regulator, any current flow
from/to VTT will result in internal power dissipation and
generating heat. In order to prevent unwanted shutdown
of the device during operation, care should be taken to
derate the power capability according to the maximum
expected ambient temperature and power dissipation. The
maximum allowable internal temperature rise, T
RMAX
can be calculated from the equation in below:
TRMAX
TJMAX
Where T
JMAX
is the maximum allowable junction
temperature and T
AMAX
is the maximum expected
ambient temperature.
The maximum allowable power dissipation for a specific
condition is given by:
TAMAX
PDMAX
TRMAX
RJA_T
Where P
DMAX
is the maximum allowable power
dissipation and R
θ
JA_T
is JunctiontoAir thermal
resistance for specific package.
The thermal handling capability depends on several
variables. Increasing the thickness and area of the copper
and adding vias and airflow can improve the thermal
performance.
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| NCP5210MNR2 | 3-in-1 PWM Dual Buck and Linear DDR Power Controller |
| NCP5210MNR2G | 3-in-1 PWM Dual Buck and Linear DDR Power Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NCP5208/D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:DDR-I/II Termination Regulator |
| NCP5208_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:DDR−I/II Termination Regulator |
| NCP5208DR2 | 功能描述:線性穩(wěn)壓器 - 標(biāo)準(zhǔn) DDR-I/II Termination RoHS:否 制造商:STMicroelectronics 輸出類型: 極性: 輸出電壓:1.8 V 輸出電流:150 mA 負(fù)載調(diào)節(jié): 最大輸入電壓:5.5 V 線路調(diào)整率: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-323-5L |
| NCP5208DR2G | 功能描述:線性穩(wěn)壓器 - 標(biāo)準(zhǔn) DDR-I/II Termination RoHS:否 制造商:STMicroelectronics 輸出類型: 極性: 輸出電壓:1.8 V 輸出電流:150 mA 負(fù)載調(diào)節(jié): 最大輸入電壓:5.5 V 線路調(diào)整率: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-323-5L |
| NCP5209/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-In-1 PWM Buck and Tri-Linear DDR Power Controller |
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