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參數資料
| 型號： | NCT72CMNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 13/20頁 |
| 文件大小： | 326K |
| 描述： | IC REMOTE THERMAL SENSOR 8-DFN |
| 標準包裝： | 1 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內部和外部 |
| 感應溫度： | 0°C ~ 127°C，-64°C ~ 191°C |
| 精確度： | ±2.5°C |
| 拓撲： | ADC，比較器，多路復用器，寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報： | 是 |
| 輸出風扇： | 是 |
| 電源電壓： | 2.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤 |
| 供應商設備封裝： | 8-DFN（3x3） |
| 包裝： | 標準包裝 |
| 其它名稱： | NCT72CMNR2GOSDKR |
NCT72
http://onsemi.com
13
3. When all data bytes have been read or written,
stop conditions are established. In write mode, the
master pulls the data line high during the tenth
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as no acknowledge. The master
takes the data line low during the low period
before the tenth clock pulse, then high during the
tenth clock pulse to assert a stop condition.
Any number of bytes of data are transferable over
the serial bus in one operation, but it is not
possible to mix read and write in one operation
because the type of operation is determined at the
beginning and cannot subsequently be changed
without starting a new operation. For the NCT72,
write operations contain either one or two bytes,
while read operations contain one byte.
To write data to one of the device data registers, or to read
data from it, the address pointer register must be set so that
the correct data register is addressed. The first byte of a write
operation always contains a valid address that is stored in the
address pointer register. If data is to be written to the device,
the write operation contains a second data byte that is written
to the register selected by the address pointer register.
This procedure is illustrated in Figure 15. The device
address is sent over the bus followed by R/W
set to 0. This
is followed by two data bytes. The first data byte is the
address of the internal data register to be written to, which
is stored in the address pointer register. The second data byte
is the data to be written to the internal data register.
Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
A6
SCLK
SDATA
A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
ACK. BY
NCT72
START BY
MASTER
1
9
1
ACK. BY
NCT72
9
D7 D6 D5 D4 D3 D2 D1 D0
ACK. BY
NCT72
STOP BY
MASTER
1
9
SCLK (CONTINUED)
SDATA (CONTINUED)
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
R/W
Figure 16. Writing to the Address Pointer Register Only
A6
SCLK
SDATA
A5 A4 A3 A2 A1 A0
D7
D6
D5 D4 D3 D2 D1 D0
ACK. BY
NCT72
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
1
9
ACK. BY
NCT72
9
R/W
Figure 17. Reading Data from a Previously Selected Register
A6
SCLK
SDATA
A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
ACK. BY
NCT72
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
1
9
ACK. BY
NCT72
9
R/W
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