參數(shù)資料
型號: NCV4275DT
廠商: ON SEMICONDUCTOR
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 5.0 V Low-Drop Voltage Regulator
中文描述: 5 V FIXED POSITIVE LDO REGULATOR, 0.5 V DROPOUT, PSSO4
封裝: DPAK-5
文件頁數(shù): 4/12頁
文件大小: 80K
代理商: NCV4275DT
NCV4275
http://onsemi.com
4
APPLICATION INFORMATION
V
I
C
I1
1000
μ
F
C
I2
100 nF
C
D
47 nF
I
I
I
D
I
D
1
4
5
2
3
GND
C
Q
22
μ
F
I
RO
I
Q
Q
RO
R
ext
5.0 k
V
Q
V
RO
Figure 3. Test Circuit
NCV4275
Circuit Description
The error amplifier compares a temperaturestable
reference voltage to a voltage that is proportional to the
output voltage (Q) (generated from a resistor divider) and
drives the base of a series transistor via a buffer. Saturation
control as a function of the load current prevents
oversaturation of the output power device, thus preventing
excessive substrate current (quiescent current).
Typical drop out voltage at 300 mA load is 250 mV,
500 mV maximum. Test voltage for drop out is 5.0 V input.
Stability Considerations
The input capacitors (C
I1
and C
I2
) are necessary to
control line influences. Using a resistor of approximately
1.0
in series with C
I2
can solve potential oscillations due
to stray inductance and capacitance.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (25
°
C to 40
°
C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers
data
sheet
information.
The value for the output capacitor C
Q
shown in Figure 3
should work for most applications, however it is not
necessarily the optimized solution. Stability is guaranteed for
C
Q
> 22 F and an ESR
5.0
.
usually
provides
this
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 4) is:
PD(max)
[VI(max)
VI(max)Iq
VQ(min)]IQ(max)
(1)
where
V
I(max)
V
Q(min)
I
Q(max)
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the
application,
is the quiescent current the regulator
consumes at I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
JA
can be calculated:
150
°
C
I
q
RJA
TA
PD
(2)
The value of R
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
JA
’s less than the calculated value in Equation 2 will keep
the die temperature below 150
°
C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
SMART
REGULATOR
Iq
Control
Features
I
Q
I
I
Figure 4. Single Output Regulator with Key
Performance Parameters Labeled
V
I
V
Q
}
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