ELECTRICAL CHARACTERISTICS (VS = 7.0" />
參數(shù)資料
型號: NCV7382DR2
廠商: ON Semiconductor
文件頁數(shù): 12/16頁
文件大?。?/td> 0K
描述: IC TRANSCEIVER LIN ENH 8-SOIC
產(chǎn)品變化通告: Product Discontinuation 21/Jun/2007
標(biāo)準(zhǔn)包裝: 2,500
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: LIN
電源電壓: 7 V ~ 18 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
NCV7382
http://onsemi.com
5
ELECTRICAL CHARACTERISTICS (VS = 7.0 to 18 V, VCC = 4.5 to 5.5 V and TA = -40 to 125°C unless otherwise noted.)
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
TXD, EN
High Level Input Voltage
Vih
Rising Edge
-
0.7*VCC
V
Low Level Input Voltage
Vil
Falling Edge
0.3*VCC
-
V
TxD Pullup Resistor
RIH_TXD
VTxD = 0 V
10
15
25
k
W
EN Pulldown Resistor
RIL_EN
VEN = 5.0 V
20
30
50
k
W
RXD
Low Level Output Voltage
Vol_rxd
IRxD = 2.0 mA
-
0.9
V
Leakage Current
Vleak_rxd
VRxD = 5.5 V, Recessive
-10
-
10
mA
INH
On Resistance
Ron_INH
Normal or Standby Mode,
VINH = VS - 1.0 V, VS = 12 V
-
20
50
W
Leakage Current
IINH_lk
EN = L, VINH = 0 V
-5.0
-
5.0
mA
AC CHARACTERISTICS
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
Propagation Delay Transmitter
(Notes 7 and 9)
ttrans_pdf
ttrans_pdr
Bus Loads: 1.0 K
W/1.0 nF,
660
W/6.8 nF, 500 W/10 nF
-
5.0
ms
Propagation Delay Transmitter Symmetry
(Notes 8 and 9)
ttrans_sym
Calculate ttrans_pdf - ttrans_pdr
-2.0
-
2.0
ms
Propagation Delay Receiver
(Notes 7, 9, 12, 13 and 14)
trec_pdf
trec_pdr
CRxD = 20 pF
-
6.0
ms
Propagation Delay Receiver Symmetry
(Notes 9, 11 and 12)
trec_sym
Calculate ttrans_pdf - ttrans_pdr
-2.0
-
2.0
ms
Slew Rate Rising and Falling Edge,
High Battery (Notes 8, 11 and 12)
|tSR_HB|
Bus Loads: VS = 18 V,
1.0 K
W/1.0 nF, 660 W/6.8 nF,
500
W/10 nF
1.0
2.0
3.0
V/
ms
Slew Rate Rising and Falling Edge,
Low Battery (Notes 8, 11 and 12)
|tSR_LB|
Bus Loads: VS = 7.0 V,
1.0 K
W/1.0 nF, 660 W/6.8 nF,
500
W/10 nF
0.5
2.0
3.0
V/
ms
Slope Symmetry, High Battery
(Notes 11 and 12)
tssym_HB
Bus Loads: VS = 18 V,
1.0 k
W/1.0 nF, 660 W/6.8 nF,
500
W/10 nF,
Calculate tsdom – tsrec
-5.0
-
+5.0
ms
Bus Duty Cycle (Note 13)
D1
D2
Calculate tBUS_rec(min)/100 ms
Calculate tBUS_rec(max)/100 ms
0.396
-
0.581
ms/ms
Receiver Debounce Time
(Notes 8, 11 and 14)
trec_deb
BUS Rising and Falling Edge
1.5
-
4.0
ms
Wakeup Filter Time
twu
Sleep Mode,
BUS Rising & Falling Edge
30
-
150
ms
EN - Debounce Time
ten_deb
Normal -> Sleep Mode Trans‐
ition
10
20
40
ms
7. Propagation delays are not relevant for LIN protocol transmission, value only information parameter.
8. No production test, guaranteed by design and qualification.
9. See Figure 2 - Input/Output Timing.
10. See Figure 8 - Slope Time Calculation.
11. See Figure 3 - Receiver Debouncing.
12. In accordance to LIN physical layer specification 1.3.
13. In accordance to LIN physical layer specification 2.0.
14. This parameter is tested by applying a square wave to the bus. The minimum slew rate for the bus rising and falling edges is 50 V/
ms.
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