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參數(shù)資料
| 型號： | NLAS5123MNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 4/10頁 |
| 文件大小： | 0K |
| 描述： | IC SWITCH SPDT 6WDFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 開關(guān) |
| 電路： | 1 x SPDT |
| 導(dǎo)通狀態(tài)電阻： | 1 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.65 V ~ 5.5 V |
| 電流 - 電源： | 500nA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-WFDFN |
| 供應(yīng)商設(shè)備封裝： | 6-WDFN（1.2x1.0） |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | NLAS5123MNR2GOSCT |
NLAS5123
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
VCC
(V)
TA = +25°C
TA = 40°C to +85°C
Unit
Min
Typ
Max
Min
Max
VIH
HIGH Level
Input Voltage
2.7
4.5
2.0
2.4
V
VIL
LOW Level
Input Voltage
2.7
4.5
0.6
0.8
V
IIN
Input Leakage Current
0 v VIN v 5.5 V
05.5
±0.1
±1
mA
IOFF
OFF State Leakage
Current (Note 7)
0 v NO, NC, COM v VCC
5.5
2.0
+2.0
±20
nA
ION
ON State Leakage
Current (Note 7)
0 v NO, NC, COM v VCC
5.5
4.0
+4.0
±40
nA
RON
Switch On Resistance
(Note 2)
IO = 100 mA,
VIS = 0 V to VCC
2.7
1.7
2.0
W
IO = 100 mA,
VIS = 0 V to VCC
4.5
1.0
1.2
ICC
Quiescent Supply
Current
All Channels ON or OFF
VIN = VCC or GND, IOUT = 0
5.5
0.5
1.0
mA
Analog Signal Range
DRON
On Resistance Match
Between Channels
(Notes 2, 3, 4)
IA = 100 mA,
VIS = 1.5 V
IA = 100 mA,
VIS = 2.5 V
2.7
4.5
0.15
0.12
0.15
W
Rflat
On Resistance
Flatness (Notes 2, 3, 5)
IA = 100 mA,
VIS = 0 V to VCC
IA = 100 mA,
VIS = 0 V to VCC
2.7
4.5
0.4
0.3
0.4
W
2. Measured by the voltage drop between NC/NO and COM pins at the indicated current through the switch. On Resistance is determined by
the lower of the voltages on the two (NO, NC, COM).
3. Parameter is characterized but not tested in production.
4. DRON = RON max RON min measured at identical VCC, temperature and voltage levels.
5. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
6. Guaranteed by Design.
7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
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