參數(shù)資料
型號: NLAST44599MNR2G
廠商: ON Semiconductor
文件頁數(shù): 1/13頁
文件大小: 0K
描述: IC SWITCH DUAL DPDT 16QFN
標(biāo)準(zhǔn)包裝: 1
功能: 開關(guān)
電路: 2 x DPDT
導(dǎo)通狀態(tài)電阻: 30 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2 V ~ 5.5 V
電流 - 電源: 4µA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-QFN(3x3)
包裝: 剪切帶 (CT)
其它名稱: NLAST44599MNR2GOSCT
Semiconductor Components Industries, LLC, 2010
November, 2010 Rev. 9
1
Publication Order Number:
NLAST44599/D
NLAST44599
Low Voltage Single Supply
Dual DPDT Analog Switch
The NLAST44599 is an advanced CMOS dualindependent
DPDT (double poledouble throw) analog switch, fabricated with
silicon gate CMOS technology. It achieves highspeed propagation
delays and low ON resistances while maintaining CMOS lowpower
dissipation. This DPDT controls analog and digital voltages that may
vary across the full powersupply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much
lower and more linear over input voltage than RON of typical CMOS
analog switches.
The channelselect input structure provides protection when
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage input/output voltage mismatch, battery backup,
hot insertion, etc.
The NLAST44599 can also be used as a quad 2to1 multiplexer
demultiplexer analog switch with two Select pins that each controls
two multiplexerdemultiplexers.
Select Pins Compatible with TTL Levels
Channel Select Input Overvoltage Tolerant to 5.5 V
Fast Switching and Propagation Speeds
BreakBeforeMake Circuitry
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model > 2000 V;
Machine Model > 100 V
Chip Complexity: 158 FETs
PbFree Packages are Available
MARKING
DIAGRAMS
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
QFN16
MN SUFFIX
CASE 485G
TSSOP16
DT SUFFIX
CASE 948F
1
T
ALYWG
G
16
http://onsemi.com
1
16
NLAT
4459
ALYWG
G
1
16
(Note: Microdot may be in either location)
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