參數(shù)資料
型號: NLX1G10AMX1TCG
廠商: ON Semiconductor
文件頁數(shù): 1/11頁
文件大?。?/td> 0K
描述: IC GATE NAND 3INP HS 6-ULLGA
標準包裝: 3,000
邏輯類型: 與非門
電路數(shù): 1
輸入數(shù): 3
電源電壓: 1.65 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 1µA
輸出電流高,低: 32mA,32mA
額定電壓和最大 CL 時的最大傳播延遲: 7ns @ 4.5V ~ 5.5V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應商設備封裝: 6-ULLGA(1.45x1)
封裝/外殼: 6-XFLGA
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2012
July, 2012 Rev. 2
1
Publication Order Number:
NLX1G10/D
NLX1G10
3-Input NAND Gate
The NLX1G10 is an advanced highspeed 3input CMOS NAND
gate in ultrasmall footprint.
The NLX1G10 input structures provide protection when voltages up
to 7.0 V are applied, regardless of the supply voltage.
Features
High Speed: tPD = 2.4 ns (Typ) @ VCC = 5.0 V
Designed for 1.65 V to 5.5 V VCC Operation
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
24 mA Balanced Output Source and Sink Capability
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input Pins
UltraSmall Packages
These are PbFree Devices
C
B
A
Y
GND
1
2
3
5
4
C
Y
&
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
6
VCC
B
A
PIN ASSIGNMENT
1
2
3B
A
GND
4
5VCC
Y
FUNCTION TABLE
L
X
H
Input
X
L
X
H
6C
Pin
Function
AB
X
L
H
Output
H
L
CY
H HIGH Logic Level
L LOW Logic Level
X = Either LOW or HIGH Logic Level
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
1
ULLGA6
1.0 x 1.0
CASE 613AD
ULLGA6
1.2 x 1.0
CASE 613AE
ULLGA6
1.45 x 1.0
CASE 613AF
MARKING
DIAGRAMS
X
= Device Marking
M
= Date Code
G
= PbFree Package
D
M
4
M
Y
M
G
UDFN6
1.2 x 1.0
CASE 517AA
UDFN6
1.45 x 1.0
CASE 517AQ
UDFN6
1.0 x 1.0
CASE 517BX
1
X M
1
X M
1
X M
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