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參數(shù)資料
| 型號： | NX25P16-VSI |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 16M X 1 FLASH 2.7V PROM, PDSO8 |
| 封裝： | 0.208 INCH, SOIC-8 |
| 文件頁數(shù)： | 5/43頁 |
| 文件大?。?/td> | 918K |
| 代理商： | NX25P16-VSI |
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W25P80 / W25P16 / W25P32
Publication Release Date: December 11, 2005
- 13 -
Revision J
9.2 INSTRUCTIONS
The instruction set of the W25P80/16/32 consists of thirteen basic instructions that are fully controlled
through the SPI bus (see Instruction Set table). Instructions are initiated with the falling edge of Chip
Select (/CS). The first byte of data clocked into the DI input provides the instruction code. Data on the
DI input is sampled on the rising edge of clock with most significant bit (MSB) first.
Instructions vary in length from a single byte to several bytes and may be followed by address bytes,
data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are completed
with the rising edge of edge /CS. Clock relative timing diagrams for each instruction are included in
figures 4 through 21. All read instructions can be completed after any clocked bit. However, all
instructions that Write, Program or Erase must complete on a byte boundary (/CS driven high after a
full 8-bits have been clocked) otherwise the instruction will be terminated. This feature further protects
the device from inadvertent writes. Additionally, while the memory is being programmed or erased, or
when the Status Register is being written, all instructions except for Read Status Register will be
ignored until the program or erase cycle has completed.
9.2.1
Manufacturer and Device Identification
MANUFACTURER ID
(M7-M0)
Winbond Serial Flash
EFh
Device ID
(ID7-ID0)
(ID15-ID0)
Instruction
ABH, 90h
9Fh
W25P80
13h
2014h
W25P16
14h
2015h
W25P32
15h
2016h
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