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參數(shù)資料
| 型號(hào)： | OAT6224S-OLT2-V4-B |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 1480-1500nm, 1244.16Mbps(Tx), 1244.16Mbps(Rx), THROUGH HOLE MOUNT, SC/PC CONNECTOR |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | OAT6224S-OLT2-V4-B |
FSAN OLT Transceiver
Preliminary
Specifications
Document
NO:
QPS-0202-087
Rev. DRAFT0.1
Oki Electric Industry Co., Ltd.
6/9
4. Timing condition
4.1 Data/Clock input timing
SDATAP/N
1.25Gbps
SCLKP/N
1.25GHz
t
clk=800ps
t
su
t
H
t
su>100ps
t
H>100ps
Figure4.1 Data/Clock input setup & hold time (In case of using clock)
Note: If you don’t use clock, you must terminate the clock input, that is, ICLKP=1.6V, ICLKN=2.4V.
4.2 Reset input timing
Electrical
output
Preceding cell
Preamble
GT>=8bits@622.08Mbps
t
rpw1>=2bit@622.08bps
T
1=<500ns@
(Note2)
T
2 >=2bits@622.08Mbps
t
rpw1
ARESETP/N
T
1
T
2
GT
Reset noise
(Note1)
Note1: Reset noise appears in electrical output. User must mask in this part. The range of this noise is
about 2bits the front and the rear of reset signal.
Note2: After packet cell, user must input ARESET. Because it is possible to output noise after packet cell
Figure4.2 Reset input timing
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