REV. A
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a
OP227
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
Analog Devices, Inc., 2002Dual, Low Noise, Low Offset
Instrumentation Operational Amplifier
PIN CONNECTIONS
NOTE
DEVICE MAY BE OPERATED EVEN IF INSERTION
IS REVERSED; THIS IS DUE TO INHERENT SYMMETRY
OF PIN LOCATIONS OF AMPLIFIERS A AND B
V–(A) AND V–(B) ARE INTERNALLY CONNECTED VIA
SUBSTRATE RESISTANCE
1.
2.
NULL (A)
NULL (A)
–IN (A)
+IN (A)
V– (B)
OUT (B)
V+ (B)
1
V+ (A)
OUT (A)
V– (A)
+IN (B)
–IN (B)
NULL (B)
NULL (B)
A
B
2
3
4
5
6
7
14
13
12
11
10
9
8
FEATURES
Excellent Individual Amplifier Parameters
Low V
OS
, 80 V Max
Offset Voltage Match, 80 V Max
Offset Voltage Match vs. Temperature, 1 V/ C Max
Stable V
OS
vs. Time, 1 V/M
O
Max
Low Voltage Noise, 3.9 nV/
÷
Hz
Max
Fast, 2.8 V/ s Typ
High Gain, 1.8 Million Typ
High Channel Separation, 154 dB Typ
GENERAL DESCRIPTION
The OP227 is the first dual amplifier to offer a combination of
low offset, low noise, high speed, and guaranteed amplifier matching
characteristics in one device. The OP227, with a V
OS
match of
25
m
V typical, a TCV
OS
match of 0.3
m
V/
∞
C typical and a 1/f corner
of only 2.7 Hz is an excellent choice for precision low noise designs.
These dc characteristics, coupled with a slew rate
of 2.8 V/
m
s
typical and a small-signal bandwidth of 8 MHz typical,
allow the
designer to achieve ac performance previously unattainable with
op amp based instrumentation designs.
When used in a three op amp instrumentation configuration, the
OP227 can achieve a CMRR in excess of 100 dB at 10 kHz. In
addition, this device has an open-loop gain of 1.5 M typical with
a 1 k
W
load. The OP227 also features an I
B
of
±
10 nA typical,
an I
OS
of 7 nA typical, and guaranteed matching of input currents
SIMPLIFIED SCHEMATIC
NON
INVERTING
INPUT (+)
INVERTING
INPUT (–)
Q3
Q6
Q1A
Q1B
Q2B
Q2A
R1
*
R3
NULL
R4
R2
*
*
R1 AND R2 ARE PREMATURELY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE.
Q21
Q11
Q12
Q27
C2
Q23
Q24
R23
R24
Q28
R5
C3
R11 C4
R12
R9
Q22
C1
Q20 Q19
Q26
Q45
Q46
OUTPUT
V-
V+
between amplifiers. These outstanding input current specifications
are realized through the use of a unique input current cancellation
circuit which typically holds I
B
and I
OS
to
±
20 nA and 15 nA
respectively over the full military temperature range.
Other sources of input referred errors, such as PSRR and CMRR,
are reduced by factors in excess of 120 dB for the individual
amplifiers. DC stability is assured by a long-term drift application
of 1.0
m
V/month.
Matching between channels is provided on all critical param-
eters including offset voltage, tracking of offset voltage versus
temperature, noninverting bias current, CMRR, and power
supply rejection ratio. This unique dual amplifier allows the
elimination of external components for offset nulling and
frequency compensation.