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參數(shù)資料
| 型號： | OP249AZ |
| 廠商： | PRECISION MONOLITHICS INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Dual, Precision JFET High Speed Operational Amplifier |
| 中文描述： | DUAL OP-AMP, 1000 uV OFFSET-MAX, 4.7 MHz BAND WIDTH, CDIP8 |
| 封裝： | CERAMIC, DIP-8 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 702K |
| 代理商： | OP249AZ |
OP249
–11–
REV. C
The OP249 was carefully designed to provide symmetrically
matched slew characteristics in both the negative and positive
directions, even when driving a large output load.
An amplifier’s slewing limitation determines the maximum
frequency at which a sinusoidal output can be obtained without
significant distortion. It is, however, important to note that the
nonsymmetric stewing typical of previously available JFET
amplifiers adds a higher series of harmonic energy content to
the resulting response—and an additional dc output compo-
nent. Examples of potential problems of nonsymmetric
slewing behavior could be in audio amplifier applications,
where a natural low distortion sound quality is desired, and in
servo or signal processing systems where a net dc offset cannot
be tolerated. The linear and symmetric stewing feature of the
OP249 makes it an ideal choice for applications that will exceed
the full-power bandwidth range of the amplifier.
Figure 42. Small-Signal Transient Response, A
V
= +1,
Z
L
= 2 k
i
100 pF, No Compensation, V
S
=
±
15 V
As with most JFET-input amplifiers, the output of the OP249
may undergo phase inversion if either input exceeds the speci-
fied input voltage range. Phase inversion will not damage the
amplifier, nor will it cause an internal latch-up condition.
Supply decoupling should be used to overcome inductance and
resistance associated with supply lines to the amplifier. A 0.1
μ
F
and a 10
μ
F capacitor should be placed between each supply
pin and ground.
OPEN-LOOP GAIN LINEARITY
The OP249 has both an extremely high open-loop gain of
1 kV/mV minimum and constant gain linearity. This feature of
the OP249 enhances its dc precision, and provides superb accu-
racy in high closed-loop gain applications. Figure 43 illustrates
the typical open-loop gain linearity—high gain accuracy is as-
sured, even when driving a 600
load.
OFFSET VOLTAGE ADJUSTMENT
The inherent low offset voltage of the OP249 will make offset
adjustments unnecessary in most applications. However, where
a lower offset error is required, balancing can be performed with
simple external circuitry, as illustrated in Figures 44 and 45.
VERTICAL 50
V/DIV
INPUT VARIATION
HORIZONTAL 5V/DIV
OUTPUT CHARGE
Figure 43. Open-Loop Gain Linearity. Variation in Open-
Loop Gain Results in Errors in High Closed-Loop Gain
Circuits. R
L
= 600
, V
S
=
±
15 V
1/2
OP249
–V
+V
V
IN
R3
R1
200k
V
R5
50k
V
R2
31
V
V
OUT
R4
V
OS
ADJUST RANGE =
6
V
R2
R1
Figure 44. Offset Adjust for Inverting Amplifier
Configuration
1/2
OP249
–V
+V
V
IN
R1
200k
V
R3
50k
V
R2
33
V
V
OUT
R5
V
OS
ADJUST RANGE =
6
V
R2
R1
R4
1 +R4
IF R2 << R4
V
OUT
V
IN
GAIN =
= 1 +
R5
R4 + R2
Figure 45. Offset Adjust for Noninverting Amplifier
Configuration
In Figure 44, the offset adjustment is made by supplying a small
voltage at the noninverting input of the amplifier. Resistors R1
and R2 attenuates the pot voltage, providing a
±
2.5 mV (with
V
S
=
±
15 V) adjustment range, referred to the input. Figure 45
illustrates offset adjust for the noninverting amplifier configura-
tion, also providing a
±
2.5 mV adjustment range. As indicated
in the equations in Figure 45, if R4 is not much greater than R2,
there will be a resulting closed-loop gain error that must be
accounted for.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OP249AZ/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:OP-AMP|DUAL|BIPOLAR/JFET|DIP|8PIN|CERAMIC |
| OP249AZMDA | 制造商:Analog Devices 功能描述: |
| OP249EJ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual, Precision JFET High Speed Operational Amplifier |
| OP249EZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| OP249FJ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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