參數(shù)資料
型號(hào): OP249EJ
廠商: PRECISION MONOLITHICS INC
元件分類(lèi): 運(yùn)動(dòng)控制電子
英文描述: Dual, Precision JFET High Speed Operational Amplifier
中文描述: DUAL OP-AMP, 500 uV OFFSET-MAX, 4.7 MHz BAND WIDTH, MBCY8
封裝: METAL CAN, TO-99, 8 PIN
文件頁(yè)數(shù): 12/17頁(yè)
文件大小: 702K
代理商: OP249EJ
OP249
–12–
REV. C
SETTLING TIME
Settling time is the time between when the input signal begins
to change and when the output permanently enters a prescribed
error band. The error bands on the output are 5 mV and 0.5 mV,
respectively, for 0.1% and 0.01% accuracy.
Figure 46 illustrates the OP249’s typical settling time of 870 ns.
Moreover, problems in settling response, such as thermal tails
and long-term ringing are nonexistent.
10
0%
100
90
500ns
10mV
870ns
Figure 46. Settling Characteristics of the OP249 to 0.01%
REFERENCE
OR V
IN
V
OUT
O1/2
+15V
–15V
PM7545
AGND
DB
11
- DB
0
12
DATA INPUT
a. Unipolar Operation
500
V
C
33pF
75
V
V
DD
0.1
m
F
0.1
m
F
OUT
1
V
REF
REFERENCE
OR V
IN
V
OUT
1/2
OP249
+15V
PM7545
DB
11
- DB
0
12
DATA INPUT
500
V
C
33pF
75
V
V
DD
0.1
m
F
OUT
1
AGND
V
REF
V
DD
R
FB
O1/2
–15V
0.1
m
F
R4
20k
V
1%
R5
10k
V
1%
R3
10k
V
1%
0.1
m
F
DGND
b. Bipolar Operation
Figure 47. Fast Settling and Low Offset Error of the OP249 Enhances CMOS DAC Performance
DAC OUTPUT AMPLIFIER
Unity-gain stability, a low offset voltage of 300
μ
V typical, and a
fast settling time of 870 ns to 0.01%, makes the OP249 an ideal
amplifier for fast digital-to-analog converters.
For CMOS DAC applications, the low offset voltage of the
OP249 results in excellent linearity performance. CMOS DACs,
such as the PM-7545, will typically have a code-dependent
output resistance variation between 11 k
and 33 k
. The
change in output resistance, in conjunction with the 11 k
feedback resistor, will result in a noise gain change. This causes
variations in the offset error, increasing linearity errors. The
OP249 features low offset voltage error, minimizing this effect
and maintaining 12-bit linearity performance over the full-scale
range of the converter.
Since the DAC’s output capacitance appears at the operational
amplifiers inputs, it is essential that the amplifier is adequately
compensated. Compensation will increase the phase margin,
and ensure an optimal overall settling response. The required
lead compensation is achieved with Capacitor C in Figure 47.
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