參數(shù)資料
型號(hào)： OP262DRUZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP GP R-R 15MHZ LN 8TSSOP
標(biāo)準(zhǔn)包裝： 1
放大器類(lèi)型： 通用
電路數(shù)： 2
輸出類(lèi)型： 滿(mǎn)擺幅
轉(zhuǎn)換速率： 13 V/µs
增益帶寬積： 15MHz
電流 - 輸入偏壓： 260nA
電壓 - 輸入偏移： 25µV
電流 - 電源： 550µA
電流 - 輸出 / 通道： 30mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 12 V，±1.35 V ~ 6 V
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 8-TSSOP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱(chēng)： OP262DRUZ-REELDKR
OP162/OP262/OP462
Data Sheet
Rev. H | Page 14 of 20
Figure 34. Maximum Power Dissipation vs. Temperature for
14-Lead Package Types
UNUSED AMPLIFIERS
It is recommended that any unused amplifiers in a dual or a
quad package be configured as a unity-gain follower with a
1 k feedback resistor connected from the inverting input to
the output, and the noninverting input tied to the ground plane.
POWER-ON SETTLING TIME
The time it takes for the output of an op amp to settle after a
supply voltage is delivered can be an important consideration in
some power-up-sensitive applications. An example of this
would be in an A/D converter where the time until valid data
can be produced after power-up is important.
The OPx62 family has a rapid settling time after power-up.
Figure 35 shows the OP462 output settling times for a single-
supply voltage of VS = +5 V. The test circuit in Figure 36 was
used to find the power-on settling times for the device.
Figure 35. Oscilloscope Photo of VS and VOUT
Figure 36. Test Circuit for Power-On Settling Time
CAPACITIVE LOAD DRIVE
The OP162/OP262/OP462 are high speed, extremely accurate
devices that tolerate some capacitive loading at their outputs. As
load capacitance increases, unity-gain bandwidth of an OPx62
device decreases. This also causes an increase in overshoot and
settling time for the output. Figure 38 shows an example of this
with the device configured for unity gain and driving a 10 k
resistor and 300 pF capacitor placed in parallel.
By connecting a series R-C network, commonly called a
“snubber” network, from the output of the device to ground,
this ringing can be eliminated and overshoot can be
significantly reduced. Figure 37 shows how to set up the
snubber network, and Figure 39 shows the improvement in
output response with the network added.
Figure 37. Snubber Network Compensation for Capacitive Loads
Figure 38. A Photo of a Ringing Square Wave
AMBIENT TEMPERATURE (
°C)
MAXIMUM
POWER
DISSIPATION
(Watts)
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0.1
0.2
0
20
45
70
95
120
00288-037
14-LEAD SOIC
14-LEAD TSSOP
10
0%
100
90
500ns
2V
50mV
VS = 5V
AV = 1
RL = 10k
00288-038
OP462
VOUT
0 TO +5V
SQUARE
10K
00288-039
1
OPx62
VIN
VOUT
RX
CX
CL
5V
00288-040
00288-
041
50mV
1s
100
90
10
0%
VS = 5V
AV = 1
CL = 300pF
RL = 10k
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