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參數(shù)資料
| 型號(hào)： | OP285GS-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP 9MHZ DUAL PREC 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 22 V/µs |
| 增益帶寬積： | 9MHz |
| 電流 - 輸入偏壓： | 100nA |
| 電壓 - 輸入偏移： | 35µV |
| 電流 - 電源： | 4mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 44 V，±4.5 V ~ 22 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
REV. A
OP285
–9–
+15V
+
2
3
8
1
4
VIN
VOUT
–15V
10pF
+
10 F
0.1 F
4.99k
2k
0.1 F
10 F
2.49k
4.99k
+
–
1/2
OP285
Figure 9. Unity-Gain Inverter
In inverting and noninverting applications, the feedback resis-
tance forms a pole with the source resistance and capacitance
(RS and CS) and the OP285’s input capacitance (CIN), as
shown in Figure 10. With RS and RF in the kilohm range, this
pole can create excess phase shift and even oscillation. A small
capacitor, CFB, in parallel with RFB eliminates this problem. By
setting RS (CS + CIN) = RFBCFB, the effect of the feedback pole
is completely removed.
CFB
RFB
CIN
VOUT
RS
CS
Figure 10. Compensating the Feedback Pole
High-Speed, Low-Noise Differential Line Driver
The circuit of Figure 11 is a unique line driver widely used in
industrial applications. With
±18 V supplies, the line driver can
deliver a differential signal of 30 V p-p into a 2.5 k
load. The
high slew rate and wide bandwidth of the OP285 combine to
yield a full power bandwidth of 130 kHz while the low noise
front end produces a referred-to-input noise voltage spectral
density of 10 nV/
√Hz. The design is a transformerless, balanced
transmission system where output common-mode rejection of
noise is of paramount importance. Like the transformer-based
design, either output can be shorted to ground for unbalanced
line driver applications without changing the circuit gain of 1.
Other circuit gains can be set according to the equation in the
diagram. This allows the design to be easily set to noninverting,
inverting, or differential operation.
2
3
A2
1
3
2
A1
5
6
7
A3
VIN
VO1
VO2
VO2 – VO1 = VIN
R2
2k
A1 = 1/2OP285
A2, A3 = 1/2 OP285
GAIN = SET R2, R4, R5 = R1 AND R, R7, R8 = R2
1
R1
2k
R3
2k
R9
50
R11
1k
P1
10k
R12
1k
R4
2k
R5
2k
R6
2k
R10
50
R8
2k
R7
2k
Figure 11. High-Speed, Low-Noise Differential Line Driver
Low Phase Error Amplifier
The simple amplifier configuration of Figure 12 uses the OP285
and resistors to reduce phase error substantially over a wide
frequency range when compared to conventional amplifier designs.
This technique relies on the matched frequency characteristics
of the two amplifiers in the OP285. Each amplifier in the circuit
has the same feedback network which produces a circuit gain of
10. Since the two amplifiers are set to the same gain and are
matched due to the monolithic construction of the OP285, they
will exhibit identical frequency response. Recall from feedback
theory that a pole of a feedback network becomes a zero in the
loop gain response. By using this technique, the dominant pole
of the amplifier in the feedback loop compensates for the domi-
nant pole of the main amplifier,
1
2
3
A1
7
A2
5
6
R1
549
R2
4.99k
R3
499
VIN
VOUT
R5
549
R4
4.99
A1, A2 = 1/2 OP285
Figure 12. Cancellation of A2’s Dominant Pole by A1
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