The network operates in p" />
參數(shù)資料
型號: OP462GSZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 7/20頁
文件大小: 0K
描述: IC OPAMP GP R-R 15MHZ LN 14SOIC
標準包裝: 1,000
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉換速率: 13 V/µs
增益帶寬積: 15MHz
電流 - 輸入偏壓: 260nA
電壓 - 輸入偏移: 25µV
電流 - 電源: 550µA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 12 V,±1.35 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 14-SOIC
包裝: 帶卷 (TR)
Data Sheet
OP162/OP262/OP462
Rev. H | Page 15 of 20
Figure 39. A Photo of a Nice Square Wave at the Output
The network operates in parallel with the load capacitor, CL,
and provides compensation for the added phase lag. The actual
values of the network resistor and capacitor are empirically
determined to minimize overshoot and maximize unity-gain
bandwidth. Table 6 shows a few sample snubber networks for
large load capacitors.
Table 6. Snubber Networks for Large Capacitive Loads
CLOAD
RX
CX
< 300 pF
140 Ω
10 nF
500 pF
100 Ω
10 nF
1 nF
80 Ω
10 nF
10 Ω
47 nF
Higher load capacitance will reduce the unity-gain bandwidth
of the device. Figure 40 shows unity-gain bandwidth vs.
capacitive load. The snubber network does not provide any
increase in bandwidth, but it substantially reduces ringing and
overshoot, as shown between Figure 38 and Figure 39.
Figure 40. Unity-Gain Bandwidth vs. CLOAD
TOTAL HARMONIC DISTORTION AND CROSSTALK
The OPx62 device family offers low total harmonic distortion
making it an excellent choice for audio applications. Figure 41
shows a graph of THD plus noise figures at 0.001% for the
OP462.
Figure 42 shows the worst case crosstalk between two amplifiers
in the OP462. A 1 V rms signal is applied to one amplifier while
measuring the output of an adjacent amplifier. Both amplifiers
are configured for unity gain and supplied with ±2.5 V.
Figure 41. THD + N vs. Frequency
Figure 42. Crosstalk vs. Frequency
PCB LAYOUT CONSIDERATIONS
Because the OP162/OP262/OP462 can provide gains at high
frequency, careful attention to board layout and component
selection is recommended. As with any high speed application,
a good ground plane is essential to achieve the optimum
performance. This can significantly reduce the undesirable
effects of ground loops and I × R losses by providing a low
impedance reference point. Best results are obtained with a
multilayer board design with one layer assigned to ground
plane.
Use chip capacitors for supply bypassing, with one end of the
capacitor connected to the ground plane and the other end
connected within 1/8 inch of each power pin. An additional
large tantalum electrolytic capacitor (4.7 F to 10 F) should be
connected in parallel. This capacitor provides current for fast,
large-signal changes at the device’s output; therefore, it does not
need to be placed as close to the supply pins.
00288-
042
10
0%
100
90
50mV
1s
VS = 5V
AV = 1
CL = 300pF
RL = 10k
WITH SNUBBER:
RX = 140
CX = 10nF
CLOAD
BANDWIDTH
(MHz)
10
7
8
9
5
6
4
3
2
1
0
10pF
100pF
1nF
10nF
00288-043
FREQUENCY (Hz)
THD+N
(%)
0.010
0.001
0.0001
20
100
1k
10k
20k
00288-044
VS = ±2.5V
AV = 1
VIN = 1.0V rms
RL = 10k
BANDWIDTH:
<10Hz TO 22kHz
FREQUENCY (Hz)
XTALK
(dBV)
–40
–90
–80
–70
–60
–50
–140
–130
–120
–110
–100
20
100
1k
10k
20k
00288-045
AV = 1
VIN = 1.0V rms
(0dBV)
RL = 10k
VS = ±2.5V
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