VDD VREF
參數(shù)資料
型號: OP467GSZ
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大小: 0K
描述: IC OPAMP GP 28MHZ QUAD 16SOIC
標準包裝: 47
放大器類型: 通用
電路數(shù): 4
轉(zhuǎn)換速率: 350 V/µs
增益帶寬積: 28MHz
電流 - 輸入偏壓: 150nA
電壓 - 輸入偏移: 200µV
電流 - 電源: 8mA
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 770 (CN2011-ZH PDF)
OP467
Rev. | Page 16 of 20
00
30
2-
0
50
15
VDD
VREFAVREFC
RFBARFBC
RFBBRFBD
VREFBVREFD
DB0 (LSB)
DS2
IOUT 1A
IOUT 1C
IOUT 2A/
IOUT 2C/
IOUT 2B
IOUT 2D
IOUT 1B
IOUT 1D
DGND
DAC8408
OUT A
OUT B
OUT D
OUT C
C1
10pF
C3
10pF
C4
10pF
C2
10pF
7
5
4
11
6
OP467
1
2
3
7
8
9
10
11
12
4
5
6
13
14
DIGITAL
CONTROL
SIGNALS
DB1
DB2
DB3
DB4
DB5
(MSB) DB7
DB6
28
27
26
22
21
20
19
18
17
25
24
23
16
R/W
A/B
DS1
0.1F
+15V
+10V
+5V
+10V
–15V
2
3
OP467 14
12
13
OP467
8
10
9
Figure 50. Quad DAC Unipolar Operation
FAST I-TO-V CONVERTER
The fast slew rate and fast settling time of the OP467 are well
suited to the fast buffers and I-to-V converters used in a variety
of applications. The circuit in Figure 50 is a unipolar quad DAC
consisting of only two ICs. The current output of the DAC8408
is converted to a voltage by the OP467 configured as an I-to-V
converter. This circuit is capable of settling to 0.1% within 200 ns.
Figure 51 and Figure 52 show the full-scale settling time of the
outputs. To obtain reliable circuit performance, keep the traces
from the IOUT of the DAC to the inverting inputs of the OP467
short to minimize parasitic capacitance.
00
30
2-
05
1
260.0ns
100ns
50mV
2V
100
90
10
0%
Figure 51. Falling Edge Output Settling Time
00
30
2-
05
2
251.0ns
100ns
50mV
2V
100
90
10
0%
Figure 52. Rising Edge Output Settling Time
00
30
2-
05
3
2k
1k
60.4k
604
50k
3pF
DAC8408
DC OFFSET
RFB
IOUT
I-V
OP467
AD847
Figure 53. DAC VOUT Settling Time Circuit
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