參數(shù)資料
型號(hào)： OP493GBC
廠商： ANALOG DEVICES INC
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Precision, Micropower Operational Amplifiers
中文描述： QUAD OP-AMP, UUC14
封裝： DIE
文件頁數(shù)： 5/16頁
文件大?。?/td> 266K
代理商： OP493GBC
ELECTRICAL SPECIFICATIONS
“ E ” Grade
Min
T yp
“ F” Grade
Min
T yp
Parameter
Symbol
Conditions
Max
Max
Units
INPUT CHARACT ERIST ICS
Offset Voltage
V
OS
OP193
OP193, –40
°
C
≤
T
A
≤
+125
°
C
OP293
OP293, –40
°
C
≤
T
A
≤
+125
°
C
OP493
OP493, –40
°
C
≤
T
A
≤
+125
°
C
–40
°
C
≤
T
A
≤
+125
°
C
–40
°
C
≤
T
A
≤
+125
°
C
75
175
100
175
125
225
15
2
1
150
250
250
350
275
375
20
4
1
μ
V
μ
V
μ
V
μ
V
μ
V
μ
V
nA
nA
V
V/mV
V/mV
μ
V
Input Bias Current
Input Offset Current
Input Voltage Range
Large Signal Voltage Gain
I
B
I
OS
V
CM
A
VO
0
60
0
60
R
L
= 100 k
, 0.03
≤
V
OUT
≤
1 V
–40
°
C
≤
T
A
≤
+125
°
C
Note 1
70
70
Long T erm Offset Voltage
V
OS
150
300
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= +1.7 V to +6 V,
–40
°
C
≤
T
A
≤
+125
°
C
V
CM
= 1.0 V, R
L
=
∞
–40
°
C
≤
T
A
≤
+125
°
C
100
94
97
90
dB
μ
A
μ
A
V
Supply Current/Amplifier
I
SY
13.2 20
13.2 20
25
±
18
25
±
18
Supply Voltage Range
V
S
+2
+2
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Voltage Noise
e
n
i
n
e
n
p-p
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
65
0.05
3
65
0.05
3
nV/
√
Hz
pA/
√
Hz
μ
V p-p
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
SR
GBP
R
L
= 2 k
10
25
10
25
V/ms
kHz
WAFER TEST LIMTS
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
V
OS
V
S
=
±
15 V, V
OUT
= 0 V
V
S
= +2 V, V
OUT
= 1.0 V
V
CM
= 1.0 V
V
CM
= 1.0 V
±
75
±
75
20
4
0 to 4
96
100
100
4.1
400
25
μ
V max
μ
V max
nA max
nA max
V min
dB min
dB min
V/mV min
V min
mV max
μ
A max
Input Bias Current
Input Offset Current
Input Voltage Range
1
Common-Mode Rejection
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing High
Output Voltage Swing Low
Supply Current/Amplifier
I
B
I
OS
V
CM
CMRR
PSRR
A
VO
V
OH
V
OL
I
SY
0
≤
V
CM
≤
4 V
V
S
=
±
1.5 V to
±
18 V
R
L
= 100 k
I
L
= 1 mA
I
L
= –1 mA
V
O
= 0 V, R
L
=
∞
, V
S
=
±
18 V
NOT ES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1
Guaranteed by CMRR test.
Specifications subject to change without notice.
(@ V
S
= +2.0 V, V
CM
= 0.1 V, T
A
= +25
8
C unless otherwse noted)
OP193/OP293/OP493
REV. A
–5–
(@ V
S
= +5.0 V, V
CM
= 0.1 V, V
OUT
= 2 V, T
A
= +25
8
C unless otherwse noted)
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