參數資料
| 型號： | OPA567AIRHGTG4 |
| 廠商： | Texas Instruments |
| 文件頁數： | 6/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP R-R 1.2MHZ 12VQFN |
| 標準包裝： | 250 |
| 放大器類型： | 通用 |
| 電路數： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 1.2 V/µs |
| 增益帶寬積： | 1.2MHz |
| 電流 - 輸入偏壓： | 1pA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 9mA |
| 電流 - 輸出 / 通道： | 2.4A |
| 電壓 - 電源，單路/雙路(±)： | 2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-VQFN 裸露焊盤 |
| 供應商設備封裝： | 12-VQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
OPA567
SBOS287A
14
www.ti.com
Current Limit Accuracy
Internally separate circuits monitor the positive and negative
current limits. Each circuit output is compared to a single
internal reference that is set by the user with an external
resistor or a resistor/voltage source combination. The OPA567
employs a patented circuit technique to achieve an accurate
and stable current limit throughout the full output range. The
initial accuracy of the current limit is typically within 3%;
however, because of internal matching limitations, the error
can be as much as 15%. The variation of the current limit with
factors such as output current level, output voltage, and
temperature is shown in the
Typical Characteristics section.
When the accuracy of one current limit (sourcing or sinking)
is more important than the other, it is possible to set its
accuracy to better than 1% by adjusting the external resistor
or the applied voltage. The accuracy of the other current limit
will still be affected by internal matching.
Current Limit Flag Pin
The OPA567 features an IFLAG pin (pin 7) that can be
monitored to determine when the part is in current limit. The
output signal of the IFLAG pin is compatible to standard logic
in single-supply applications. The output signal is a CMOS
logic gate that switches from V+ to V– to indicate that the
amplifier is in current limit. The IFLAG pin can source and sink
up to 25
A. Additional parasitic capacitance between pins 6
and 7 can cause instability at the edge of the current limit.
Avoid routing these traces in parallel close to each other.
Quiescent Current Dependence on the
Current Limit Setting
The OPA567 is a low-power amplifier, with a typical 3.4mA
quiescent current (with the current limit configured for 200mA).
The quiescent current varies with the current limit setting—
it increases 0.5mA for each additional 200mA increase in
the current limit, as shown in Figure 3.
FIGURE 3. Quiescent Current vs Current Limit Setting.
ENABLE PIN—OUTPUT DISABLE
The Enable pin can disable the OPA567 within microsec-
onds. When disabled, the amplifier draws less than 10
A and
its output enters a high-impedance state that allows multi-
plexing. It is important to note that when the amplifier is
disabled, the Thermal Flag pin (TFLAG) circuitry continues to
operate. This feature allows use of the TFLAG pin output to
implement thermal protection strategies. For more details,
please see the section on thermal protection.
The OPA567 Enable pin has an internal pull-up circuit, so it
does not have to be connected to the positive supply for
normal operation. To disable the amplifier, the Enable pin
must be connected to no more than (V–) + 0.8V. To enable
the amplifier, either allow the Enable pin to float or connect
it to at least (V–) + 2.5V.
The Enable pin is referenced to the negative supply (V–).
Therefore, shutdown operation is slightly different in single-
supply and dual-supply applications.
In single-supply operation, V– typically equals common
ground; thus, the enable/disable logic signal and the OPA567
Enable pin are referenced to the same potential. In this
configuration, the logic level and the OPA567 Enable pin can
simply be tied together. Disabling the OPA567 occurs for
voltage levels of less than 0.8V. The OPA567 is enabled at
logic levels greater than 2.5V.
In dual-supply operation, the logic level is referenced to a
logic ground. However, the OPA567 Enable pin is still refer-
enced to V–. To disable the OPA567, the voltage level of the
logic signal needs to be level-shifted. This level-shifting can
be done using an optocoupler, as shown in Figure 4.
Examples of output behavior during disabled and enabled
conditions with various load impedances are shown in the
typical characteristics section. Please note that this behavior
is a function of board layout, load impedances, and bypass
strategies. For sensitive loads, the use of a low-pass filter or
other protection strategy is recommended.
FIGURE 4. OPA567 Shutdown Configuration for Dual
Supplies.
10
8
6
4
2
0
QUIESCENT CURRENT vs CURRENT LIMIT SETTING
Current Limit Setting (A)
Quiescent
Current
(mA)
0
0.5
1
1.5
2
2.5
Optocoupler
4N38
NOTE: (1) Optional—may be required
to limit leakage current of optocoupler
at high temperatures.
Enable
V+
V
O
8
9
11
2, 3
4, 5
1, 12
(a) +5V
(b) HCT or TTL In
HCT or
TTL In
(a)
(b)
OPA567
(1)
V–
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