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參數(shù)資料
| 型號： | OQ2535HP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SDH/SONET STM16/OC48 multiplexer(SDH/SONET STM16/OC48多路復(fù)用器) |
| 中文描述： | MUX/DEMUX, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, SOT-470-1, HLQFP-100 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 95K |
| 代理商： | OQ2535HP |
1999 Oct 04
8
Philips Semiconductors
Product specification
SDH/SONET STM16/OC48 multiplexer
OQ2535HP
ESD protection
All pads are protected by ESD protection diodes with the
exception of the high frequency outputs DOUT, DOUTQ,
DLOOP, DLOOPQ, COUT, COUTQ, CLOOP and
CLOOPQ and clock inputs CIN and CINQ.
Cooling
In many cases it is necessary to mount a special cooling
device on the package. The thermal resistance from
junction to case, R
th j-c
and from junction to ambient, R
th j-a
,
are given in Chapter “Thermal characteristics”. Since the
heat-slug in the package is connected to the die, the
cooling device should be electrically isolated.
To calculate if a heatsink is necessary, the maximum
allowed total thermal resistance R
th
is calculated as:
T
T
–
P
tot
(1)
where:
R
th
= total thermal resistance from junction to ambient in
the application
T
j
= junction temperature
T
amb
= ambient temperature.
As long as R
th
is greater than R
th j-a
of the OQ2536HP
including environmental conditions such as air flow and
board layout, no heatsink is necessary.
For example if T
j
= 120
°
C, T
amb
= 55
°
C and
P
tot
= 1.65 W, then:
55
–
)
1.65
(2)
which is more than the worst case R
th j-a
= 33 K/W, so no
heatsink is necessary.
Another example; if for safety reasons T
j
should stay as
low as 110
°
C, while T
amb
= 85
°
C and P
tot
= 2 W, then:
85
–
)
2.0
(3)
In this case extra cooling is needed. The thermal
resistance of the heatsink is calculated as follows:
(4)
where:
R
th h-a
= thermal resistance from heatsink to ambient
R
th c-h
= thermal resistance from case to heatsink
R
th j-c
= thermal resistance from junction to case,
see Chapter “Thermal characteristics”.
If for instance R
th c-h
= 0.5 K/W and R
th j-a
= 33 K/W then:
12.5
33
(5)
Built in temperature sensor
Three series-connected diodes have been integrated for
measuring junction temperature. The diode array,
accessed by means of the DIOA (anode) and DIOC
(cathode) pins, has a temperature dependency of
approximately
6 mV/
°
C.Withadiodecurrentof1 mA,the
voltage will be somewhere in the range of 1.7 to 2.5 V,
depending on temperature.
Boundary Scan Test (BST) interface
Boundary scan test logic has been implemented for all
digitalinputs andoutputsonthelowfrequencyinterface,in
accordance with “IEEE Std 1149.1-1990” All scan tests
other than SAMPLE mode are available. The boundary
scan test logic consists of a TAP controller, a BYPASS
register, a 2-bit instruction register, a 32-bit identification
register and a 36-bit boundary scan register (the last two
are combined). The architecture of the TAP controller and
the BYPASS register is in accordance with IEEE
recommendations.Thefourcommandmodes,selectedby
means of the instruction register, are: EXTEST (00),
PRELOAD (01), IDCODE (10) and BYPASS (11). All
boundary scan test inputs, TDI, TMS, TCK and TRST,
have internal pull-up resistors. The maximum test clock
frequency at TCK is 12 MHz.
R
th
-----------------------
=
R
th
-120
39.4 K/W
=
=
R
th
-110
12.5 K/W
=
=
R
th h-a
th
R
th j-a
R
–
1
–
R
th j-c
–
R
th c-h
–
≤
R
th h-a
----1
1
–
1
–
3.1
–
17.0 K/W
≤
≤
Table 1
BST identifier code
Note
1.
LSB is shifted out first on the TDO pin.
VERSION
OQ
2535 (BINARY)
PHILIPS SEMICONDUCTORS
LSB
(1)
0001
01
00 1001 1110 0111
0000 0010 101
1
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