參數(shù)資料
型號: OQ2536HP
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)字傳輸電路
英文描述: SDH/SONET STM16/OC48 demultiplexer(SDH/SONET STM16/OC48多路分解器)
中文描述: MUX/DEMUX, PQFP100
文件頁數(shù): 8/20頁
文件大?。?/td> 127K
代理商: OQ2536HP
1998 Mar 10
8
Philips Semiconductors
Product specification
SDH/SONET STM16/OC48 demultiplexer
OQ2536HP
where:
R
th
= total thermal resistance from junction to ambient
in the application
T
j
= junction temperature
T
amb
= ambient temperature.
As long as R
th
is greater than R
th j-a
of the OQ2536HP
including environmental conditions like air flow and board
layout, no heatsink is necessary. For example if
T
j
= 120
°
C, T
amb
= 70
°
C and P
tot
= 1.45 W, then:
70
)
1.45
(2)
which is more than the worst case R
th j-a
= 33 K/W, so no
heatsink is necessary.
Another example; if for safety reasons T
j
should stay as
low as 110
°
C, while T
amb
= 85
°
C and P
tot
= 2 W, then:
85
)
2.0
(3)
In this case extra cooling is needed. The thermal
resistance of the heatsink is calculated as follows:
R
th
R
thj
(4)
where:
R
th h-a
= thermal resistance from heatsink to ambient
R
th c-h
= thermal resistance from case to heatsink
R
th j-c
= thermal resistance from junction to case,
see Chapter “Thermal characteristics”.
R
th
--120
34.4
=
=
K W
[
]
R
th
--110
12.5
=
=
K W
[
]
R
thh
a
-1
a
-------1
1
R
thj
c
R
thc
h
If for instance R
th c-h
= 0.5 K/W and R
th j -a
= 33 K/W then:
(5)
Built in temperature sensor
Three series-connected diodes have been integrated for
measuring junction temperature. The diode array,
accessed by means of the DIOA (anode) and DIOC
(cathode) pins, has a temperature dependency of
approximately
6 mV/
°
C. With a diode current of 1 mA,
the voltage will be somewhere in the range 1.7 to 2.5 V,
depending on temperature.
Boundary Scan Test (BST) interface
Boundary scan test logic has been implemented for all
digital inputs and outputs on the low frequency interface, in
accordance with “IEEE Std 1149.1-1990” All scan tests
other than SAMPLE mode are available. The boundary
scan test logic consists of a TAP controller, a BYPASS
register, a 2-bit instruction register, a 32-bit identification
register and a 36-bit boundary scan register (the last two
are combined). The architecture of the TAP controller and
the BYPASS register is in accordance with IEEE
recommendations.
The four command modes, selected be means of the
instruction register, are: EXTEST (00), PRELOAD (01),
IDCODE (10) and BYPASS (11).
All boundary scan test inputs, TDI, TMS, TCK and TRST,
have internal pull up resistors. The maximum test clock
frequency at TCK is 12 MHz.
R
thh
a
12.5
1
1
3.1
17.0
K W
[
]
Table 1
BST identifier code
Notes
1.
2.
LSB is shifted out first on the TDO pin.
The manufacturer’s code was implemented incorrectly. It should have been 0000 0010 101.
VERSION
OQ
2536 (BINARY)
PHILIPS SEMICONDUCTORS
0000 0011 101
(2)
LSB
(1)
0001
01
00 1001 1110 1000
1
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