參數(shù)資料
型號(hào)： OR2C06A-4PS160I
廠商： Electronic Theatre Controls, Inc.
元件分類： FPGA
英文描述： Field-Programmable Gate Arrays
中文描述： 現(xiàn)場(chǎng)可編程門陣列
文件頁(yè)數(shù)： 122/192頁(yè)
文件大?。?/td> 3148K
代理商： OR2C06A-4PS160I
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)當(dāng)前第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)
Lucent Technologies Inc.
35
Data Sheet
June 1999
ORCA Series 2 FPGAs
Interquad Routing (continued)
5-4201(F).r4
Figure 31. Horizontal Subquad Routing
Connectivity
The X4 and XH lines make the only connections to the
subquad lines; therefore, the array remains symmetri-
cal and homogeneous. Since each subquad is made
from a 4 x 4 array of PLCs, the distance between sets
of subquad lines is four PLCs, which is also the dis-
tance between the breaks of the X4 lines. Therefore,
each X4 line will cross exactly one set of subquad lines.
Since all X4 lines make the same connections to the
subquad lines that they cross, all X4 lines in the array
have the same connectivity, and the symmetry of the
routing is preserved. Since all XH lines cross the same
number of subquad blocks, the symmetry is maintained
for the XH lines as well.
The new subquad lines travel a length of eight PLCs
(seven PLCs on the outside edge) before they are bro-
ken. Unlike other inter-PLC lines, they cannot be con-
nected end-to-end. As shown in Figure 30, some of the
horizontal (vertical) subquad lines have connectivity to
the subquad to the left of (above) the current subquad,
while others have connectivity to the subquad to the
right (below). This allows connections to/from the cur-
rent subquad from/to the PLCs in all subquads that sur-
round it.
Between all subquads, including in the center of the
array, there are three groups of subquad lines where
each group contains four lines. Figure 31 shows the
connectivity of these three groups of subquad lines
(HSUB) to the VX4 and VXH lines running between a
vertical pair of PLCs. Between each vertical pair of
subquad blocks, four of the blocks shown in Figure 31
are used, one for each pair of vertical PLCs.
The first two groups, depicted as A and B, have con-
nectivity to only one of the two sets of X4 lines between
pairs of PLCs. Since they are very lightly loaded, they
are very fast. The third group, C, connects to both
groups of X4 lines between pairs of PLCs, as well as all
of the XH lines between pairs of PLCs, providing high
flexibility. The connectivity for the vertical subquad rout-
ing (Vsub) is the same as described above for the hori-
zontal subquad routing, when rotated onto the other
axis.
At the center row and column of each quadrant, a
fourth group of subquad lines has been added. These
subquad lines only have connectivity to the XH lines.
The XH lines are also broken at this point, which
means that each XH line travels one-half of the quad-
rant (i.e., one-quarter of the device) before it is broken
by a CIP. Since the XH lines can be connected end-to-
end, the resulting line can be either one-quarter, one-
half, three-quarters, or the entire length of the array.
The connectivity of the XH lines and this fourth group of
subquad lines, indicated as D, are detailed in Figure
32. Again, the connectivity for the vertical subquad
routing (VSUB) is the same as the horizontal subquad
routing, when rotated onto the other axis.
5-4202(F).r3
Figure 32. Horizontal Subquad Routing
Connectivity (Half Quad)
A
C
B
HSUB[11]
HSUB[10]
HSUB[9]
HSUB[8]
HSUB[7]
HSUB[6]
HSUB[5]
HSUB[4]
HSUB[3]
HSUB[2]
HSUB[1]
HSUB[0]
HSUB[11]
HSUB[10]
HSUB[9]
HSUB[8]
HSUB[7]
HSUB[6]
HSUB[5]
HSUB[4]
HSUB[3]
HSUB[2]
HSUB[1]
HSUB[0]
VX4[7]
VX4[6]
VX4[5]
VX4[4]
VX4[3]
VX4[2]
VX4[1]
VX4[0]
VX4[3]
VX4[2]
VX4[1]
VX4[0]
VX4[7]
VX4[6]
VX4[5]
VX4[4]
VX4[3]
VX4[2]
VX4[1]
VX4[0]
VX4[3]
VX4[2]
VX4[1]
VX4[0]
A
D
B
HSUB[11]
HSUB[10]
HSUB[9]
HSUB[8]
HSUB[15]
HSUB[14]
HSUB[13]
HSUB[12]
HSUB[3]
HSUB[2]
HSUB[1]
HSUB[0]
HSUB[11]
HSUB[10]
HSUB[9]
HSUB[8]
HSUB[15]
HSUB[14]
HSUB[13]
HSUB[12]
HSUB[3]
HSUB[2]
HSUB[1]
HSUB[0]
VX
4
[7
]
VX
4
[6
]
VX
4
[5
]
VX
4
[4
]
VX
4
[3
]
VX
4[
2
]
VX
4
[1
]
VX
4
[0
]
VX
4
[3
]
VX
4
[2
]
VX
4
[1
]
VX
4
[0
]
VX
4
[7
]
VX
4
[6
]
VX
4
[5
]
VX
4
[4
]
VX
4
[3
]
VX
4
[2
]
VX
4
[1
]
VX
4
[0
]
VX
4
[3
]
VX
4
[2
]
VX
4
[1
]
VX
4
[0
]
C
HSUB[7]
HSUB[6]
HSUB[5]
HSUB[4]
HSUB[7]
HSUB[6]
HSUB[5]
HSUB[4]
相關(guān)PDF資料
PDF描述
OR2C06A-4PS208 Field-Programmable Gate Arrays
OR2C06A-4PS208I Field-Programmable Gate Arrays
OR2C06A-4PS240 Field-Programmable Gate Arrays
OR2C06A-4PS240I Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 330pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1808; Termination: Solder Coated SnPb; Body Dimensions: 0.180" x 0.080" x 0.080"; Container: Bag; Features: MIL-PRF-55681: P Failure Rate
OR2C06A-4PS256 Field-Programmable Gate Arrays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OR2C06A-4PS208 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays
OR2C06A-4PS208I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays
OR2C06A-4PS240 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays
OR2C06A-4PS240I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays
OR2C06A-4PS256 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*