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| 型號： | OR2C06A3S240I-DB |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 144 CLBS, 6900 GATES, PQFP240 |
| 封裝： | SQFP-240 |
| 文件頁數(shù)： | 101/196頁 |
| 文件大小： | 1393K |
| 代理商： | OR2C06A3S240I-DB |
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Lattice Semiconductor
19
Data Sheet
November 2006
ORCA Series 2 FPGAs
Programmable Logic Cells (continued)
PLC Routing Resources
Generally, the ispLEVER development system is used
to automatically route interconnections. Interactive
routing with the ispLEVER design editor (EPIC) is also
available for design optimization. To use EPIC for inter-
active layout, an understanding of the routing
resources is needed and is provided in this section.
The routing resources consist of switching circuitry and
metal interconnect segments. Generally, the metal
lines which carry the signals are designated as routing
nodes (lines). The switching circuitry connects the rout-
ing nodes, providing one or more of three basic func-
tions: signal switching, amplication, and isolation. A
net running from a PFU or PIC output (source) to a
PLC or PIC input (destination) consists of one or more
lines, connected by switching circuitry designated as
congurable interconnect points (CIPs).
The following sections discuss PLC, PIC, and interquad
routing resources. This section discusses the PLC
switching circuitry, intra-PLC routing, inter-PLC routing,
and clock distribution.
Congurable Interconnect Points
The process of connecting lines uses three basic types
of switching circuits: two types of congurable intercon-
nect points (CIPs) and bidirectional buffers (BIDIs). The
basic element in CIPs is one or more pass transistors,
each controlled by a conguration RAM bit. The two
types of CIPs are the mutually exclusive (or multi-
plexed) CIP and the independent CIP.
A mutually exclusive set of CIPs contains two or more
CIPs, only one of which can be on at a time. An inde-
pendent CIP has no such restrictions and can be on
independent of the state of other CIPs. Figure 19
shows an example of both types of CIPs.
f.13(F)
Figure 19. Congurable Interconnect Point
3-Statable Bidirectional Buffers
Bidirectional buffers provide isolation as well as ampli-
cation for signals routed a long distance. Bidirectional
buffers are also used to drive signals directly onto
either vertical or horizontal XL and XH lines (to be
described later in the inter-PLC routing section). BIDIs
are also used to indirectly route signals through the
switching lines. Any number from zero to eight BIDIs
can be used in a given PLC.
The BIDIs in a PLC are divided into two nibble-wide
sets of four (BIDI and BIDIH). Each of these sets has a
separate BIDI controller that can have an application
net connected to its TRI input, which is used to 3-state
enable the BIDIs. Although only one application net
can be connected to both BIDI controllers, the sense of
this signal (active-high, active-low, or ignored) can be
congured independently. Therefore, one set can be
used for driving signals, the other set can be used to
create 3-state buses, both sets can be used for 3-state
buses, and so forth.
2
INDEPENDENT CIP
CD
A
B
AB
=
MULTIPLEXED CIP
A
B
C
A
B
C
O
CD
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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