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| 型號： | P03A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 運(yùn)算放大器 |
| 英文描述： | POWER OPERATIONAL AMPLIFIERS |
| 中文描述： | 功耗運(yùn)算放大器 |
| 文件頁數(shù)： | 4/4頁 |
| 文件大?。?/td> | 99K |
| 代理商： | P03A |
OPERATING
CONSIDERATIONS
PA03 PA03A
GENERAL
Please read the “General Operating Considerations” section,
which covers stability, supplies, heatsinking, mounting, current
limit, SOA interpretation, and specification interpretation. Addi-
tional information can be found in the application notes. For
information on the package outline, heatsinks, and mounting
hardware, consult the “Accessory and Package Mechanical Data”
section of the handbook.
MOUNTING PRECAUTIONS
The PA03 copper base is very soft and easily bent. Do not put
any stress on the mounting ears of this package. This calls for
caution when pushing the amplifier into certain types of packaging
foam and particularly when inserting the device into a socket.
Insert the amplifier into the socket only by pushing on the perimeter
of the package lid. Pushing the unit into the socket by applying
pressure to the mounting tabs will bend the base due to the high
insertion force required. The base will then not contact the heatsink
evenly resulting in very poor heat transfer. To remove a unit from
a socket, pry the socket away from the heatsink so that the
heatsink will support the amplifier base evenly. Recommended
mounting torque is 8–10 in.-lbs. (.9–1.13 Nm).
SAFE OPERATING AREA (SOA)
Due to the internal (non-adjustable) current limit of the PA03,
worst case power dissipation calculations must assume current
capability of 46 amps. Application specific circuits should be
checked against the SOA curve when relying upon current limit for
fault protectio
n.
SAFE OPERATING AREA CURVES
Second breakdown limitations do apply to the PA03 but are
less severe, since junction temperature limiting responds
within 10ms. Stress levels shown as being safe for more than
10ms duration
will
merely
cause thermal
shutdown.
Under nor-
mal operating
conditions, ac-
tivation of the
thermal shut-
down is a sign
that the inter-
nal junction
temperatures
have reached
approximately
175
°
C. Thermal shutdown is a short term safety feature. If the
conditions remain that cause thermal shutdown, the amplifier
will oscillate in and out of shutdown, creating peak high power
stresses, destroying useful signals, and reducing the reliability
of the device.
BALANCE CONTROL
The voltage offset of the PA03 may be externally adjusted to
zero. To implement this adjustment install a 100 to 200 ohm
potentiometer between pins 11 and 12 and connect the wiper arm
to the positive supply. Bypass pins 11 and 12 each with at least a
.01
μ
F ceramic capacitor.
If the optional adjust provision is not used, connect both pins 11
and 12 to the positive supply.
OUTPUT STAGE SHUTDOWN
The entire power stage of the PA03 may be disabled using one
of the circuits shown in Figure 1. There are many applications for
this function. One is a load protection based on power delivered to
the load or thermal rise. Another one is conservation of power
when using batteries. The control voltage requirements accom-
modate a wide variety logic drivers.
1. CMOS operating at +5V can drive the control pins directly.
2. CMOS operating at greater than 5V supplies need a voltage
divider.
3. TTL logic needs a pull up resistor to +5V to provide a swing to
the fully disabled voltage (3.5V). When not using the shutdown
feature, connect both pins 3 and 4 to common.
PHASE COMPENSATION
At low gain settings an external compensation capacitor is
required to insure stability. In addition to the resistive feedback
network, roll off or integrating capacitors must also be considered.
A frequency of 1 MHz is most appropriate to calculate gain.
Operation at gains below 10, without the external compensation
capacitor opens the possibility of oscillations near output satura-
tion regions when under load, the improper operation of the
thermal shutdown circuit. This can result in amplifier destruction.
At gains of 10 or more:
1. No external components are required.
2. Typical slew rate will be 8V/
μ
s.
3. Typical phase margin will be 70
°
.
At a gain of 3:
1. Connect a 470pF compensation capacitor between pins 9 and
10.
2. Typical slew rate will be 5V/
μ
s.
3. Typical phase margin will be 45
°
.
At unity gain:
1. Connect a 1.8nF compensation capacitor between pins 9 and
10.
2. Typical slew rate will be 1.8V/
μ
s.
3. Typical phase margin will be 65
°
.
1
10
20
50
100
150
5
10
30
40
SUPPLY TO OUTPUT DIFFERENTIAL V
S
–V
O
(V)
O
S
S
)
CURRENT LIMIT ZONE
100mS
10mS
10mS
THERMAL
SCONDBRADOWN
T
C
= 25°C
dc
4
3
0 = OPERATE
1 = SHUT DN
500
Q14
Q22
1K
1K
*
+5V
500
PA03
* NOT REQUIRED
CMOS LOGIC
FIGURE 1a.
DIRECT DRIVE
OF SHUTDOWN
3
0 = SHUT DN
1 = OPERATE
500
Q14
Q22
1K
R
+15V
500
PA03
FIGURE 1b.
HIGH VOLTAGE
LOGIC INTERFACE
CMOS
4
4
3
500
Q14
Q22
1K
R1
**
500
PA03
FIGURE 1c.
THERMALLY
ACTIVATED
SHUTDOWN
R2
LOAD
R4
36R3
360–
THERMAL SENSE
TRANSISTOR
+V
S
2R
** SELECT SHUTOFF
TEMPERATURE
DROP ON R2
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
PA03U REV. I FEBRUARY 1998
1998 Apex Microtechnology Corp.
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