參數(shù)資料
型號: P1011PSE2HFB
廠商: Freescale Semiconductor
文件頁數(shù): 1/2頁
文件大小: 0K
描述: IC MPU 800MHZ 689TEPBGAII
產(chǎn)品培訓模塊: QorIQ™ P2 Family
P1 Platform Overview
標準包裝: 1
系列: QorIQ P1
處理器類型: e500
速度: 800MHz
安裝類型: 表面貼裝
封裝/外殼: 689-BBGA 裸露焊盤
供應商設備封裝: 689-TEPBGA II(31x31)
包裝: 托盤
其它名稱: P1011PSE2HFA
P1011PSE2HFA-ND
QorIQ P1011 and P1020
communications processors
Overview
Freescale QorIQ communications platforms are
the next-generation evolution of our leading
PowerQUICC communications processors. Built
using high-performance Power Architecture
cores, QorIQ platforms enable a new era of
networking innovation where the reliability,
security and quality of service for every
connection matters.
QorIQ P1011 and P1020
Communications Processors
The QorIQ P1 family, which includes the P1011
and P1020 communications processors, offers
the value of smart integration and efficient
power for a wide variety of applications in the
networking, telecom, defense and industrial
markets. Based on 45 nm technology for low
power, the P1011 and P1020 processors provide
both single- and dual-core options, from
533–800 MHz, along with advanced security
and a rich set of interfaces.
The P1011 and P1020 processors are ideally
suited for multiservice gateways, Ethernet switch
controllers, wireless LAN access points and high-
performance general-purpose control processor
applications with tight thermal constraints.
The P1011 and P1020 processors are
pin-compatible with the QorIQ P2 platform
products, offering a four-chip range of cost-
effective solutions. Scaling from a single core
at 533 MHz (P1011) to a dual core at
1.2 GHz per core (P2020), the combined
QorIQ platforms offer an impressive 4.5x
aggregate frequency range.
The P1011 and P1020 platforms are software
compatible, and both feature the e500 Power
Architecture core and peripherals, as well
as being fully software compatible with the
earlier PowerQUICC processors. This enables
customers to create a product with multiple
performance points from a single board design.
The P1020 dual-core processor supports both
symmetric and asymmetric processing, enabling
customers to further optimize their design with
the same applications running on each core
or serialize their application using the cores for
different processing tasks.
QorIQ P1020 and P1011 Block Diagram
32 KB
L1 I Cache
Power Architecture
e500 Core
32 KB
L1 D Cache
256 KB
L2 Cache
32 KB
L1 I Cache
Power Architecture
e500 Core
32 KB
L1 D Cache
DDR2/DDR3
SDRAM Controller
Not on P1011
Coherency Module
System Bus
4-ch. DMA Controller
2x PCI Express
On-Chip Network
4-lane SerDes
Security
Acceleration
XOR
DUART, 2x I2C, Timers,
Interrupt Control,
SD/MMC, SPI,
2x USB 2.0/ULPI
3x
Gigabit
Ethernet
Enhanced Local Bus
Controller (eLBC)
TDM
Accelerators and Memory Control
Networking Elements
Core Complex (CPU, L2 and Frontside CoreNet Platform Cache)
Basic Peripherals and Interconnect
QorIQ P1011 and P1020 Block Diagram
P Series
QorIQ Communications Platforms
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