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參數(shù)資料
| 型號(hào)： | P10C68-45CG |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| 中文描述： | 的CMOS / SNOS非易失性SRAM的高性能8畝× 8非易失性靜態(tài)RAM的 |
| 文件頁(yè)數(shù)： | 4/17頁(yè) |
| 文件大小： | 162K |
| 代理商： | P10C68-45CG |
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P10C68/P11C68
4
Characteristic
Average power supply
current
Average power supply current
during STORE cycle
Average power supply current
(standby, cycling TTL input levels)
Average power supply current
(standby, stable CMOS input levels)
Input leakage current (any input)
Off state output leakage current
Output logic '1' voltage
Output voltage '0' voltage
Industrial temperature range
Test conditions (unless otherwise stated):
Tamb = -40C to 70C, Vcc = +5V
±
10% (See notes 4, 5 and 6)
Symbol
I
CC1
I
CC2
I
SB1
I
SB2
I
ILK
I
OLK
V
OH
V
OL
Value
Units
mA
mA
mA
mA
mA
mA
μ
A
μ
A
V
V
Conditions
t
AVAV
= 35ns
t
AVAV
= 45ns
All inputs at V
IN
≤
0.2V
t
AVAV
= 35ns
t
AVAV
= 45ns
E(bar)
≥
V
IH
, all other inputs
cycling
E (bar)
≥
(V
CC
-0.2V), all other
inputs at V
IN
≤
0.2V or
≥
(V
CC
-
0.2V)
V
CC
= max, V
IN
= V
SS
to V
CC
V
CC
= max, V
IN
= V
SS
to V
CC
I
OUT
= 4mA
I
OUT
= 8mA
Max.
80
75
50
27
23
1
±
1
±
5
0.4
Min.
2.4
Input pulse levels
Input rise and fall times
Input and output timing reference levels
Output load
V
SS
to 3V
≤
5ns
1.5V
See Figure 3
AC TEST CONDITIONS
CAPACITANCE
T
amb
= 25
°
C, f = 1.0MHz (see note 7)
Parameter
Input capacitance
Output capacitance
Symbol
C
IN
C
OUT
Units
pF
pF
Max.
5
7
Conditions
V=0 to 3V
V=0 to 3V
NOTE
7. These parameters are characterised but not 100% tested.
NOTES
4.
5.
I
CC1
is dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
Bringing E (bar)
≥
V
IH
will not produce standby currents levels until any non-volatile cycle in progress has timed out. See
Mode Selection table.
I
CC2
is the average current required for the duration of the STORE cycle (t
STORE
) after the sequence that initiates the
cycle.
6.
5.0V
480 Ohms
30p
INCLUDING
SCOPE AND
FIXTURE
255
Ohms
OUTPUT
Figure 3. AC output loading.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P10C68-45CGDCBS | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| P10C68-45CGDPBS | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| P10C68-45DCBS | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| P10C68-45DPBS | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
| P10C68-45IG | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM |
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