參數(shù)資料
型號: P10C68-IGDCBS
廠商: Zarlink Semiconductor Inc.
英文描述: CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM
中文描述: 的CMOS / SNOS非易失性SRAM的高性能8畝× 8非易失性靜態(tài)RAM的
文件頁數(shù): 15/17頁
文件大小: 162K
代理商: P10C68-IGDCBS
P10C68/P11C68
15
On power-up, once Vcc exceeds the Vcc sense voltage of
3.3V, a RECALL cycle is automatically initiated. The voltage
on the Vcc pin must not drop below 3.3V once it has risen
above it in order for the RECALL to operate properly. Due to
this automatic RECALL, SRAM operation cannot commence
until t
RECALL
after Vcc exceeds 3.3V.
The automatic RECALL feature can be adversely affected
by factors such as supply rise time, temperature and elapsed
time since the last STORE cycle. For this reason it is
recommended that the user initiate a RECALL cycle after
power-up for critical applications.
PACKAGE DETAILS
Dimensions are shown thus: mm (in). For further package
information please contact your local Customer Service
Centre.
0.229/0.308
(0.009/0.012)
7.37/7.87
(0.290/0.310)
3.30/4.06
(0.130/0.160)
1.016/1.524
(0.040/0.060)
7.620/8.128
(0.300/0.320)
PIN 1
1.27 (0.050) TYP
35.20/35.92
(1.386/1.414)
1.930/2.39
(0.05576/0.094)
0.36/0.51
(0.014/0.020)
2.54
(0.100)
Figure 16, 28-lead sidebrazed ceramic DIL (0.3in) DCB
PIN 1
Pin 1 Ref. notch
Leads
0.3/0.55 (0.76/1.4)
1.37 (34.8)
0.02 (0.51)
0.015/0.02
(0.38/0.53)
0.1 (2.54)
0.2/0.3
0.12 (3.05) min
0.2 (5.08) max
0.288
(7.32)
Nominal Centres
0.3 (7.62)
SEATING
PLANE
Figure 17. 28 plastic DIL Package (0.3in) DPB
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P10C68-IGDPBS 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM
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