參數(shù)資料
型號(hào): P2040AF-08-ST
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 時(shí)鐘及定時(shí)
英文描述: LCD Panel EMI Reduction IC
中文描述: 2040 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-8
文件頁(yè)數(shù): 5/9頁(yè)
文件大?。?/td> 354K
代理商: P2040AF-08-ST
October 2005
rev 1.2
P2040A
LCD Panel EMI Reduction IC
5 of 9
Notice: The information in this document is subject to change without notice.
Absolute Maximum Ratings
Symbol
VDD, V
IN
Parameter
Rating
-0.5 to +7.0
Unit
V
Voltage on any pin with respect to Ground
T
STG
Storage temperature
-65 to +125
°C
T
C
Operating temperature-Commercial
0 to 70
°C
T
A
Operating temperature – Automotive
-40 to +125
°C
T
J
Junction Temperature
150
°C
T
DV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability
.
2
KV
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
Parameter
V
IL
Input low voltage
Min
Typ
-
Max
0.8
Unit
V
VSS - 0.3
V
IH
Input high voltage
Input low current
(pull-up resistor on inputs SR0, SR1 and MRA)
Input high current (pull-down resistor on input SSON#)
2.0
-
VDD + 0.3
V
I
IL
-35
-
-
μA
I
IH
-
-
35
μA
V
OL
Output low voltage (VDD = 3.3V, I
OL
= 20mA)
-
-
0.4
V
V
OH
Output high voltage (VDD = 3.3V, I
OH
= 20mA)
2.5
-
-
V
I
DD
Static supply current standby mode
-
0.6
-
mA
I
CC
Dynamic supply current (3.3V and 10pF loading)
7
10
13
mA
VDD
Operating voltage
2.7
3.3
3.7
V
t
ON
Power-up time (first locked cycle after power up)
-
0.18
-
mS
Z
OUT
Clock output impedance
-
50
-
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
f
IN
Input frequency
30
-
100
MHz
f
OUT
Output frequency
30
-
100
MHz
t
LH
*
Output rise time (measured at 0.8V to 2.0V)
0.7
0.9
1.1
nS
t
HL
*
Output fall time (measured at 2.0V to 0.8V)
0.6
0.8
1.0
nS
t
JC
Jitter (cycle to cycle)
-
-
360
pS
t
D
Output duty cycle
45
50
55
%
*t
LH
and t
HL
are measured into a capacitive load of 15pF
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