參數(shù)資料
型號(hào): P2560BF-08ST
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Low Frequency EMI Reduction
中文描述: 32 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: SOIC-8
文件頁數(shù): 2/7頁
文件大?。?/td> 187K
代理商: P2560BF-08ST
November 2003
rev 1.0
Pin Configuration
P2560B
Low Frequency EMI Reduction
2 of 7
Notice: The information in this document is subject to change without notice.
Standby Mode Selection
CLKIN
SSON/SBM
Spread Spectrum
ModOUT
PLL
Mode
Disabled
0
N/A
Disabled
Disabled
Free
running
Disabled
Standby
Disabled
1
N/A
Disabled
Free running
Enabled
0
Off
Reference
Buffer out
Enabled
1
On
Normal
Normal
Normal
Spread Range Selection, VDD = 3.3 V
CLKIN frequency
Spreading range
Modulation rate
20 MHz
±1.16%
25 MHz
±1.13%
27 MHz
±1.11%
30 MHz
±1.0%
32 MHz
±1.0%
(CLKIN/10) * 20.83 kHz
Pin Description
Pin# Pin Name
Type
Description
1
XIN/CLK
I
Crystal connection or external reference frequency input. This pin has dual
functions. It can be connected to either an external crystal or an external
reference clock.
Crystal connection. If using an external reference, this pin must be left
unconnected.
Digital logic input used to select normal output mode or divide-by-2 output mode.
When this pin is HIGH, the frequency of the output clock is the same as the input
clock frequency. When it is tied LOW, the output frequency is half the input clock
frequency. This pin has an internal pull-up resistor.
Ground to entire chip.
Digital logic input used to select Spreading Range (Refer Spread Deviation
Table). This pin has an internal pull-up resistor.
Digital logic input used to enable Spread Spectrum function (Active LOW).
Spread Spectrum function enabled when LOW, disabled when HIGH. This pin
has an internal pull-low resistor.
Spread spectrum low EMI output.
Power supply for the entire chip (5V).
2
XOUT
O
3
DIV2
I
4
VSS
P
5
SR0
I
6
SSON#
I
7
8
MODOUT
VDD
O
P
P2560B
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