參數(shù)資料
型號(hào)： P3000AA61RP
英文描述： MCU CMOS 44LD LOW PWR, -40C to +85C, 44-QFN, T/R
中文描述： SIDAC的| 330V五（公報(bào)）最大| 800mA的我（縣）|對(duì)220VAR
文件頁數(shù)： 122/161頁
文件大小： 986K
代理商： P3000AA61RP
SIDACtor Selection Criteria
SIDACtor
Data Book
5 - 6
Teccor Electronics
(972) 580-7777
For metallic surges (TIP-RING):
R
SOURCE
= V
PK
/I
PK
R
TOTAL
= R
TIP
+ R
RING
+ R
SOURCE
Example 1: A modem manufacturer must pass the Type A surge requirement of FCC Part 68
without any series resistance.
I
PK
= 100A, 10 x 560 μs
∴
I
PP
≥
100A, 10 x 560 μs
Example 2: A line card manufacturer must pass the surge requirements of Bellcore 1089 with
30
on Tip and 30
on Ring.
I
PK
= 100A, 10 x 1000 μs
V
PK
= 1000V
R
SOURCE
= V
PK
/I
PK =
10
R
TOTAL
= R
SOURCE +
R
TIP
= 40
I
PK (available)
= V
PK
/R
TOTAL
= 100V/40
∴
I
PP
≥
25A
Holding Current (I
H
)
Because FCC Part 68.306.A.6.iii specifies that registered terminal equipment not
exceed 140mA of DC current per conductor under short circuit conditions, the holding
current of the SIDACtor is set at 150mA.
For specific design criteria, the holding current (I
H
) of the SIDACtor must be greater
than the DC current that can be supplied during an operational and short circuit
condition.
Off-State Capacitance (C
O
)
Assuming that the critical point of insertion loss is 70% of the original signal value, the
SIDACtor can be used in most applications with transmission speeds of up to 30MHz.
For transmission speeds greater than 30MHz, a compensation circuit may be required.
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