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| 型號： | P4C187-12PMB |
| 廠商： | Pyramid Semiconductor Corporation |
| 英文描述： | ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS |
| 中文描述： | 超高速64K的× 1靜態(tài)CMOS五羊 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 323K |
| 代理商： | P4C187-12PMB |
P4C187/187L
Page 3 of 12
Document #
SRAM111
REV B
*V
CC
= 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V.
CE
= V
IL
.
DATA RETENTION CHARACTERISTICS (P4C187L Military Temperature Only)
Symbol
V
DR
I
CCDR
t
CDR
t
R
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to
Data Retention Time
Operation Recovery Time
Test Conditons
CE
≥
V
CC
–0.2V,
V
IN
≥
V
CC
–0.2V
or V
IN
≤
0.2V
Min
2.0
0
t
RC
§
Typ.*
V
=
2.0V 3.0V
Max
V
=
2.0V 3.0V
Unit
10
15
600
900
V
μA
ns
ns
*T
A
= +25°C
§t
RC
= Read Cycle Time
This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
I
CC
Symbol Parameter
Temperature
Range
Commercial
Dynamic
Operating
Current*
Industrial
Military
–10
N/A
–12
–15
–20
–25
–35
–45
Unit
N/A
mA
mA
mA
POWER DISSIPATION CHARACTERISTICS VS. SPEED
N/A
150
155
160
170
180
N/A
170
160
155
150
145
180
170
160
155
150
N/A
N/A
–85
N/A
145
N/A
–70
N/A
145
N/A
–55
N/A
145
N/A
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