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參數(shù)資料
| 型號(hào)： | P4C188-20DMB |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
| 中文描述： | 16K X 4 STANDARD SRAM, 20 ns, CDIP22 |
| 封裝： | 0.300 INCH, CERDIP-22 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大小： | 215K |
| 代理商： | P4C188-20DMB |
P4C188/188L
Page 5 of 12
Document #
SRAM112
REV A
12. Transition is measured ±200mV from steady state voltage prior to
change with specified loading in Figure 1. This parameter is
sampled and not 100% tested.
Notes:
9.
CE
and
WE
must be LOW for WRITE cycle.
10. If
CE
goes HIGH simultaneously with
WE
HIGH, the output remains
in a high impedance state.
11. Write Cycle Time is measured from the last valid address to the first
transition address.
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
WE
CONTROLLED)
(9)
AC CHARACTERISTICS - WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym.
Parameter
-10
-12
-15
-20
-25
-35
-45
Unit
Min
10
Min
Min
Min
Min
Min
Min
Max
Max
Max
Max
Max
Max
Max
t
WC
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
DW
Write Cycle Time
Chip Enable
Time to
End of Write
Address Valid
to End of Write
Address
Set-up Time
Write Pulse
Width
Address Hold
Time from
End of Write
Data Valid to
End of Write
Data Hold
Time
Write Enable
to Output in
High Z
Output Active
from End
of Write
7
7
0
8
0
5
0
2
5
12
8
8
0
9
0
6
0
2
6
13
10
10
0
10
0
7
0
2
6
20
13
15
0
13
0
8
0
2
8
25
15
20
0
15
0
10
0
2
35
25
25
0
25
0
15
0
3
15
45
35
35
0
35
0
20
5
3
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P4C188-20JM | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
| P4C188-20JMB | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
| P4C188-20LI | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
| P4C188-20LMB | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
| P4C188-20PM | ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS |
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|---|---|
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| P4C214-20PP52C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
| P4C214-25GR52B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
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