參數(shù)資料
型號: P80C31UFPN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: CABLE STRIPPER, JOKARI DATACABLE STRIPPER, JOKARI DATA; Stripping Capacity:4mm2; Weight:60g
中文描述: 8-BIT, MICROCONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, DIP-40
文件頁數(shù): 11/38頁
文件大小: 350K
代理商: P80C31UFPN
Philips Semiconductors
Product specification
80C51/87C51/80C31
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
2000 Jan 20
11
Not Bit Addressable
Symbol
Function
Not implemented, reserved for future use.*
T2OE
Timer 2 Output Enable bit.
DCEN
Down Count Enable bit. When set, this allows Timer 2 to be configured as an up/down counter.
T2OE
DCEN
SU00729
7
6
5
4
3
2
1
0
*
User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features.
In that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
Bit
T2MOD
Address = 0C9H
Reset Value = XXXX XX00B
Figure 3. Timer 2 Mode (T2MOD) Control Register
OSC
÷
12
C/T2 = 0
C/T2 = 1
TR2
CONTROL
TL2
(8-BITS)
TH2
(8-BITS)
TF2
RCAP2L
RCAP2H
EXEN2
CONTROL
EXF2
TIMER 2
INTERRUPT
T2EX PIN
TRANSITION
DETECTOR
T2 PIN
RELOAD
SU00067
Figure 4. Timer 2 in Auto-Reload Mode (DCEN = 0)
相關(guān)PDF資料
PDF描述
P80C31X2BA 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz
P80C51X2BA 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz
P80C51X2BBD 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz
P80C51UBPN 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V, low power, high speed 33 MHz
P80C31UBPN 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V, low power, high speed 33 MHz
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