參數(shù)資料
型號(hào)： P80C32
廠商： NXP Semiconductors N.V.
英文描述： 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz
中文描述： 80C51的8位單片機(jī)系列4K/8K/16K/32K的ROM / RAM的檢察官辦公室128B/256B低電壓2.7至5.5 V，低功耗，高速33分之30兆赫
文件頁(yè)數(shù)： 28/56頁(yè)
文件大?。?/td> 337K
代理商： P80C32
Philips Semiconductors
Product specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
1999 Apr 01
28
(8XC51FX and 8XC51RX+ ONLY)
CCAPMn
Address
CCAPM0
CCAPM1
CCAPM2
CCAPM3
CCAPM4
0DAH
0DBH
0DCH
0DDH
0DEH
Reset Value = X000 0000B
–
ECOMn
CAPPn
CAPNn
MATn
TOGn
PWMn
ECCFn
Not Bit Addressable
Bit:
Symbol
Function
–
ECOMn
CAPPn
CAPNn
MATn
Not implemented, reserved for future use*.
Enable Comparator. ECOMn = 1 enables the comparator function.
Capture Positive, CAPPn = 1 enables positive edge capture.
Capture Negative, CAPNn = 1 enables negative edge capture.
Match. When MATn = 1, a match of the PCA counter with this module’s compare/capture register causes the CCFn bit
in CCON to be set, flagging an interrupt.
Toggle. When TOGn = 1, a match of the PCA counter with this module’s compare/capture register causes the CEXn
pin to toggle.
Pulse Width Modulation Mode. PWMn = 1 enables the CEXn pin to be used as a pulse width modulated output.
Enable CCF interrupt. Enables compare/capture flag CCFn in the CCON register to generate an interrupt.
TOGn
PWMn
ECCFn
NOTE:
*User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive value of the new
bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
SU00037
7
6
5
4
3
2
1
0
Figure 19. CCAPMn: PCA Modules Compare/Capture Registers
–
X
X
X
X
X
X
X
X
ECOMn
0
X
X
X
1
1
1
1
CAPPn
0
1
0
1
0
0
0
0
CAPNn
0
0
1
1
0
0
0
0
MATn
0
0
0
0
1
1
0
1
Figure 20. PCA Module Modes (CCAPMn Register)
TOGn
0
0
0
0
0
1
0
X
PWMn
0
0
0
0
0
0
1
0
ECCFn
0
X
X
X
X
X
0
X
MODULE FUNCTION
No operation
16-bit capture by a positive-edge trigger on CEXn
16-bit capture by a negative trigger on CEXn
16-bit capture by a transition on CEXn
16-bit Software Timer
16-bit High Speed Output
8-bit PWM
Watchdog Timer
PCA Capture Mode
To use one of the PCA modules in the capture mode either one or
both of the CCAPM bits CAPN and CAPP for that module must be
set. The external CEX input for the module (on port 1) is sampled for
a transition. When a valid transition occurs the PCA hardware loads
the value of the PCA counter registers (CH and CL) into the
module’s capture registers (CCAPnL and CCAPnH). If the CCFn bit
for the module in the CCON SFR and the ECCFn bit in the CCAPMn
SFR are set then an interrupt will be generated. Refer to Figure 21.
16-bit Software Timer Mode
The PCA modules can be used as software timers by setting both
the ECOM and MAT bits in the modules CCAPMn register. The PCA
timer will be compared to the module’s capture registers and when a
match occurs an interrupt will occur if the CCFn (CCON SFR) and
the ECCFn (CCAPMn SFR) bits for the module are both set (see
Figure 22).
High Speed Output Mode
In this mode the CEX output (on port 1) associated with the PCA
module will toggle each time a match occurs between the PCA
counter and the module’s capture registers. To activate this mode
the TOG, MAT, and ECOM bits in the module’s CCAPMn SFR must
be set (see Figure 23).
Pulse Width Modulator Mode
All of the PCA modules can be used as PWM outputs. Figure 24
shows the PWM function. The frequency of the output depends on
the source for the PCA timer. All of the modules will have the same
frequency of output because they all share the PCA timer. The duty
cycle of each module is independently variable using the module’s
capture register CCAPLn. When the value of the PCA CL SFR is
less than the value in the module’s CCAPLn SFR the output will be
low, when it is equal to or greater than the output will be high. When
CL overflows from FF to 00, CCAPLn is reloaded with the value in
CCAPHn. the allows updating the PWM without glitches. The PWM
and ECOM bits in the module’s CCAPMn register must be set to
enable the PWM mode.
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